target/loongarch: Add other core instructions support

This includes:
-CACOP
-LDDIR
-LDPTE
-ERTN
-DBCL
-IDLE

Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-29-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Xiaojuan Yang 2022-06-06 20:43:18 +08:00 committed by Richard Henderson
parent fcbbeb8ecd
commit d2cba6f7ce
7 changed files with 233 additions and 0 deletions

View file

@ -399,3 +399,68 @@ static bool trans_invtlb(DisasContext *ctx, arg_invtlb *a)
ctx->base.is_jmp = DISAS_STOP;
return true;
}
static bool trans_cacop(DisasContext *ctx, arg_cacop *a)
{
/* Treat the cacop as a nop */
if (check_plv(ctx)) {
return false;
}
return true;
}
static bool trans_ldpte(DisasContext *ctx, arg_ldpte *a)
{
TCGv_i32 mem_idx = tcg_constant_i32(ctx->mem_idx);
TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
if (check_plv(ctx)) {
return false;
}
gen_helper_ldpte(cpu_env, src1, tcg_constant_tl(a->imm), mem_idx);
return true;
}
static bool trans_lddir(DisasContext *ctx, arg_lddir *a)
{
TCGv_i32 mem_idx = tcg_constant_i32(ctx->mem_idx);
TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
if (check_plv(ctx)) {
return false;
}
gen_helper_lddir(dest, cpu_env, src, tcg_constant_tl(a->imm), mem_idx);
return true;
}
static bool trans_ertn(DisasContext *ctx, arg_ertn *a)
{
if (check_plv(ctx)) {
return false;
}
gen_helper_ertn(cpu_env);
ctx->base.is_jmp = DISAS_EXIT;
return true;
}
static bool trans_dbcl(DisasContext *ctx, arg_dbcl *a)
{
if (check_plv(ctx)) {
return false;
}
generate_exception(ctx, EXCCODE_DBP);
return true;
}
static bool trans_idle(DisasContext *ctx, arg_idle *a)
{
if (check_plv(ctx)) {
return false;
}
tcg_gen_movi_tl(cpu_pc, ctx->base.pc_next + 4);
gen_helper_idle(cpu_env);
ctx->base.is_jmp = DISAS_NORETURN;
return true;
}