mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 15:53:54 -06:00
Trivial patches pull request 20210916
-----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmFDUCMSHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748Oi0P/0Osr0C7A/movW2TCCIXtA/a3vjEtE6s FpWlmLtjTT6bODu8GjAq2QszByb0K5aKap55y1FEn3cejueXdbrZLCMBKh7Rgjr8 iu8tkJMBR0WtC8vIMoSDNbmGmOl8gXAsWwtAB24nRjXODT8SePShqsXbGFK0BsbL 88duxEqwVMtQnHESa0v3gPt+vYNrZC3p2zBN3pxR7RTGEQKa3kMAHTqu5dm/OtAB dhNVT79HMagP1Nm+NqPqMbPW5Jwh9DPNWJ4Pf4cKvHKxyE9fnwvUNiNqiBTah/oK B/LPLfru6f5ndKYvpGddex+0ToAqfd/J/W2m6qo5fp8c4XyTn77prNJauM7ij+tu 72hCATsFVuaSJo1hgs70boo00rLd4JifumQRPahekAQBudHSy28K76oC7Km42cyG S01zkJ7cVo9fBj0csj95P5tegGznmXsklk0bQf78lwJAcf4TnAL9bh4cRNi/0Xle sRQsBB5DGJbn32t+Oo3g+AHP448uHQPBT/CuwN4S3C+fguAaY3wBAd9GLwJSZeFW lg8UejcZQ6b4fY+W3Q7fr4tIRqALbqFhAltQqnOqXZuNGNtup6E/SZEZZCjtIRyz +RsNBTrb8MvbaHGwzXYfLWUUPUGrD/Tea+CpKX5IpVXIlAgNzKejY/urmq4kWA72 NYLVtXDNRw3A =z2sk -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.2-pull-request' into staging Trivial patches pull request 20210916 # gpg: Signature made Thu 16 Sep 2021 15:09:39 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-for-6.2-pull-request: target/sparc: Make sparc_cpu_dump_state() static target/avr: Fix compiler errors (-Werror=enum-conversion) hw/vfio: Fix typo in comments intel_iommu: Fix typo in comments target/i386: spelling: occured=>occurred, mininum=>minimum configure: add missing pc-bios/qemu_vga.ndrv symlink in build tree spelling: sytem => system qdev: Complete qdev_init_gpio_out() documentation hw/i386/acpi-build: Fix a typo util: Remove redundant checks in the openpty() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
d1fe59377b
16 changed files with 32 additions and 30 deletions
|
|
@ -1916,7 +1916,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
|
|||
PCMachineState *pcms = PC_MACHINE(machine);
|
||||
int nb_numa_nodes = machine->numa_state->num_nodes;
|
||||
NodeInfo *numa_info = machine->numa_state->nodes;
|
||||
ram_addr_t hotplugabble_address_space_size =
|
||||
ram_addr_t hotpluggable_address_space_size =
|
||||
object_property_get_int(OBJECT(pcms), PC_MACHINE_DEVMEM_REGION_SIZE,
|
||||
NULL);
|
||||
|
||||
|
|
@ -2022,10 +2022,10 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
|
|||
* Memory devices may override proximity set by this entry,
|
||||
* providing _PXM method if necessary.
|
||||
*/
|
||||
if (hotplugabble_address_space_size) {
|
||||
if (hotpluggable_address_space_size) {
|
||||
numamem = acpi_data_push(table_data, sizeof *numamem);
|
||||
build_srat_memory(numamem, machine->device_memory->base,
|
||||
hotplugabble_address_space_size, nb_numa_nodes - 1,
|
||||
hotpluggable_address_space_size, nb_numa_nodes - 1,
|
||||
MEM_AFFINITY_HOTPLUGGABLE | MEM_AFFINITY_ENABLED);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -679,7 +679,7 @@ static inline bool vtd_pe_type_check(X86IOMMUState *x86_iommu,
|
|||
}
|
||||
break;
|
||||
default:
|
||||
/* Unknwon type */
|
||||
/* Unknown type */
|
||||
return false;
|
||||
}
|
||||
return true;
|
||||
|
|
@ -692,7 +692,7 @@ static inline bool vtd_pdire_present(VTDPASIDDirEntry *pdire)
|
|||
|
||||
/**
|
||||
* Caller of this function should check present bit if wants
|
||||
* to use pdir entry for futher usage except for fpd bit check.
|
||||
* to use pdir entry for further usage except for fpd bit check.
|
||||
*/
|
||||
static int vtd_get_pdire_from_pdir_table(dma_addr_t pasid_dir_base,
|
||||
uint32_t pasid,
|
||||
|
|
@ -746,7 +746,7 @@ static int vtd_get_pe_in_pasid_leaf_table(IntelIOMMUState *s,
|
|||
|
||||
/**
|
||||
* Caller of this function should check present bit if wants
|
||||
* to use pasid entry for futher usage except for fpd bit check.
|
||||
* to use pasid entry for further usage except for fpd bit check.
|
||||
*/
|
||||
static int vtd_get_pe_from_pdire(IntelIOMMUState *s,
|
||||
uint32_t pasid,
|
||||
|
|
@ -1507,7 +1507,7 @@ static int vtd_sync_shadow_page_table(VTDAddressSpace *vtd_as)
|
|||
}
|
||||
|
||||
/*
|
||||
* Check if specific device is configed to bypass address
|
||||
* Check if specific device is configured to bypass address
|
||||
* translation for DMA requests. In Scalable Mode, bypass
|
||||
* 1st-level translation or 2nd-level translation, it depends
|
||||
* on PGTT setting.
|
||||
|
|
|
|||
|
|
@ -557,7 +557,7 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
|
|||
* must allocate a 1MB aligned reserved memory region below 4GB with
|
||||
* the requested size (in bytes) for use by the Intel PCI class VGA
|
||||
* device at VM address 00:02.0. The base address of this reserved
|
||||
* memory region must be written to the device BDSM regsiter at PCI
|
||||
* memory region must be written to the device BDSM register at PCI
|
||||
* config offset 0x5C.
|
||||
*/
|
||||
bdsm_size = g_malloc(sizeof(*bdsm_size));
|
||||
|
|
|
|||
|
|
@ -1356,7 +1356,7 @@ static bool vfio_radeon_smc_is_running(VFIOPCIDevice *vdev)
|
|||
/*
|
||||
* The scope of a config reset is controlled by a mode bit in the misc register
|
||||
* and a fuse, exposed as a bit in another register. The fuse is the default
|
||||
* (0 = GFX, 1 = whole GPU), the misc bit is a toggle, with the forumula
|
||||
* (0 = GFX, 1 = whole GPU), the misc bit is a toggle, with the formula
|
||||
* scope = !(misc ^ fuse), where the resulting scope is defined the same as
|
||||
* the fuse. A truth table therefore tells us that if misc == fuse, we need
|
||||
* to flip the value of the bit in the misc register.
|
||||
|
|
|
|||
|
|
@ -1364,7 +1364,7 @@ static void vfio_pci_relocate_msix(VFIOPCIDevice *vdev, Error **errp)
|
|||
* TODO: Lookup table for known devices.
|
||||
*
|
||||
* Logically we might use an algorithm here to select the BAR adding
|
||||
* the least additional MMIO space, but we cannot programatically
|
||||
* the least additional MMIO space, but we cannot programmatically
|
||||
* predict the driver dependency on BAR ordering or sizing, therefore
|
||||
* 'auto' becomes a lookup for combinations reported to work.
|
||||
*/
|
||||
|
|
@ -2158,7 +2158,7 @@ static void vfio_pci_pre_reset(VFIOPCIDevice *vdev)
|
|||
}
|
||||
|
||||
/*
|
||||
* Stop any ongoing DMA by disconecting I/O, MMIO, and bus master.
|
||||
* Stop any ongoing DMA by disconnecting I/O, MMIO, and bus master.
|
||||
* Also put INTx Disable in known state.
|
||||
*/
|
||||
cmd = vfio_pci_read_config(pdev, PCI_COMMAND, 2);
|
||||
|
|
@ -2384,7 +2384,7 @@ out_single:
|
|||
}
|
||||
|
||||
/*
|
||||
* We want to differentiate hot reset of mulitple in-use devices vs hot reset
|
||||
* We want to differentiate hot reset of multiple in-use devices vs hot reset
|
||||
* of a single in-use device. VFIO_DEVICE_RESET will already handle the case
|
||||
* of doing hot resets when there is only a single device per bus. The in-use
|
||||
* here refers to how many VFIODevices are affected. A hot reset that affects
|
||||
|
|
|
|||
|
|
@ -156,7 +156,7 @@ static void vfio_mmap_set_enabled(VFIOPlatformDevice *vdev, bool enabled)
|
|||
* if there is no more active IRQ
|
||||
* @opaque: actually points to the VFIO platform device
|
||||
*
|
||||
* Called on mmap timer timout, this function checks whether the
|
||||
* Called on mmap timer timeout, this function checks whether the
|
||||
* IRQ is still active and if not, restores the fast path.
|
||||
* by construction a single eventfd is handled at a time.
|
||||
* if the IRQ is still active, the timer is re-programmed.
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue