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hw/cxl/cxl-mailbox-utils: Fix for device DDR5 ECS control feature tables
CXL spec 3.1 section 8.2.9.9.11.2 describes the DDR5 Error Check Scrub (ECS)
control feature.
ECS log capabilities field in following ECS tables, which is common for all
memory media FRUs in a CXL device.
Fix struct CXLMemECSReadAttrs and struct CXLMemECSWriteAttrs to make
log entry type field common.
Fixes: 2d41ce38fb
("hw/cxl/cxl-mailbox-utils: Add device DDR5 ECS control feature")
Signed-off-by: Shiju Jose <shiju.jose@huawei.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20241014121902.2146424-6-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
parent
80ee960f8d
commit
d1853190db
3 changed files with 35 additions and 34 deletions
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@ -1133,10 +1133,8 @@ static CXLRetCode cmd_features_get_supported(const struct cxl_cmd *cmd,
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(struct CXLSupportedFeatureEntry) {
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.uuid = ecs_uuid,
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.feat_index = index,
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.get_feat_size = CXL_ECS_NUM_MEDIA_FRUS *
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sizeof(CXLMemECSReadAttrs),
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.set_feat_size = CXL_ECS_NUM_MEDIA_FRUS *
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sizeof(CXLMemECSWriteAttrs),
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.get_feat_size = sizeof(CXLMemECSReadAttrs),
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.set_feat_size = sizeof(CXLMemECSWriteAttrs),
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.attr_flags = CXL_FEAT_ENTRY_ATTR_FLAG_CHANGABLE,
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.get_feat_version = CXL_ECS_GET_FEATURE_VERSION,
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.set_feat_version = CXL_ECS_SET_FEATURE_VERSION,
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@ -1204,13 +1202,10 @@ static CXLRetCode cmd_features_get_feature(const struct cxl_cmd *cmd,
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(uint8_t *)&ct3d->patrol_scrub_attrs + get_feature->offset,
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bytes_to_copy);
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} else if (qemu_uuid_is_equal(&get_feature->uuid, &ecs_uuid)) {
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if (get_feature->offset >= CXL_ECS_NUM_MEDIA_FRUS *
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sizeof(CXLMemECSReadAttrs)) {
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if (get_feature->offset >= sizeof(CXLMemECSReadAttrs)) {
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return CXL_MBOX_INVALID_INPUT;
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}
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bytes_to_copy = CXL_ECS_NUM_MEDIA_FRUS *
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sizeof(CXLMemECSReadAttrs) -
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get_feature->offset;
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bytes_to_copy = sizeof(CXLMemECSReadAttrs) - get_feature->offset;
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bytes_to_copy = MIN(bytes_to_copy, get_feature->count);
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memcpy(payload_out,
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(uint8_t *)&ct3d->ecs_attrs + get_feature->offset,
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@ -1299,18 +1294,17 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd,
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ecs_set_feature = (void *)payload_in;
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ecs_write_attrs = ecs_set_feature->feat_data;
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memcpy((uint8_t *)ct3d->ecs_wr_attrs + hdr->offset,
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memcpy((uint8_t *)&ct3d->ecs_wr_attrs + hdr->offset,
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ecs_write_attrs,
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bytes_to_copy);
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set_feat_info->data_size += bytes_to_copy;
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if (data_transfer_flag == CXL_SET_FEATURE_FLAG_FULL_DATA_TRANSFER ||
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data_transfer_flag == CXL_SET_FEATURE_FLAG_FINISH_DATA_TRANSFER) {
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ct3d->ecs_attrs.ecs_log_cap = ct3d->ecs_wr_attrs.ecs_log_cap;
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for (count = 0; count < CXL_ECS_NUM_MEDIA_FRUS; count++) {
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ct3d->ecs_attrs[count].ecs_log_cap =
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ct3d->ecs_wr_attrs[count].ecs_log_cap;
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ct3d->ecs_attrs[count].ecs_config =
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ct3d->ecs_wr_attrs[count].ecs_config & 0x1F;
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ct3d->ecs_attrs.fru_attrs[count].ecs_config =
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ct3d->ecs_wr_attrs.fru_attrs[count].ecs_config & 0x1F;
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}
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}
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} else {
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@ -1324,7 +1318,7 @@ static CXLRetCode cmd_features_set_feature(const struct cxl_cmd *cmd,
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if (qemu_uuid_is_equal(&hdr->uuid, &patrol_scrub_uuid)) {
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memset(&ct3d->patrol_scrub_wr_attrs, 0, set_feat_info->data_size);
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} else if (qemu_uuid_is_equal(&hdr->uuid, &ecs_uuid)) {
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memset(ct3d->ecs_wr_attrs, 0, set_feat_info->data_size);
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memset(&ct3d->ecs_wr_attrs, 0, set_feat_info->data_size);
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}
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set_feat_info->data_transfer_flag = 0;
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set_feat_info->data_saved_across_reset = false;
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