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Make MIPS MT implementation more cache friendly.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3981 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-02-12 21:01:26 +00:00
parent 577d8dd437
commit d0dc7dc327
12 changed files with 96 additions and 96 deletions
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10
target-mips/op_template.c
View file

@ -21,31 +21,31 @@
#if defined(REG)
void glue(op_load_gpr_T0_gpr, REG) (void)
{
T0 = env->gpr[REG][env->current_tc];
T0 = env->gpr[env->current_tc][REG];
FORCE_RET();
}
void glue(op_store_T0_gpr_gpr, REG) (void)
{
env->gpr[REG][env->current_tc] = T0;
env->gpr[env->current_tc][REG] = T0;
FORCE_RET();
}
void glue(op_load_gpr_T1_gpr, REG) (void)
{
T1 = env->gpr[REG][env->current_tc];
T1 = env->gpr[env->current_tc][REG];
FORCE_RET();
}
void glue(op_store_T1_gpr_gpr, REG) (void)
{
env->gpr[REG][env->current_tc] = T1;
env->gpr[env->current_tc][REG] = T1;
FORCE_RET();
}
void glue(op_load_gpr_T2_gpr, REG) (void)
{
T2 = env->gpr[REG][env->current_tc];
T2 = env->gpr[env->current_tc][REG];
FORCE_RET();
}