util: spelling fixes

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20230823065335.1919380-3-mjt@tls.msk.ru>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
This commit is contained in:
Michael Tokarev 2023-08-23 09:53:15 +03:00 committed by Philippe Mathieu-Daudé
parent c342a5d38c
commit d02d06f8f1
13 changed files with 18 additions and 18 deletions

View file

@ -1,6 +1,6 @@
/*
* SPDX-License-Identifier: GPL-2.0-or-later
* Host specific cpu indentification for x86.
* Host specific cpu identification for x86.
*/
#include "qemu/osdep.h"
@ -74,7 +74,7 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
* of their memory operands to be 16-byte aligned.
*
* AMD has provided an even stronger guarantee that processors
* with AVX provide 16-byte atomicity for all cachable,
* with AVX provide 16-byte atomicity for all cacheable,
* naturally aligned single loads and stores, e.g. MOVDQU.
*
* See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104688