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add an init function parameter to qemu_chr_open()
And use it for the malta emulation. Fix segfault introduced in revision 6352. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6365 c046a42c-6fe2-441c-8c8c-71466251a162
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ceecf1d158
9 changed files with 36 additions and 25 deletions
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@ -418,7 +418,24 @@ static void malta_fpga_reset(void *opaque)
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s->display_text[8] = '\0';
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snprintf(s->display_text, 9, " ");
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malta_fpga_update_display(s);
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}
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static void malta_fpga_uart_init(CharDriverState *chr)
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{
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qemu_chr_printf(chr, "CBUS UART\r\n");
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}
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static void malta_fpga_led_init(CharDriverState *chr)
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{
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qemu_chr_printf(chr, "\e[HMalta LEDBAR\r\n");
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qemu_chr_printf(chr, "+--------+\r\n");
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qemu_chr_printf(chr, "+ +\r\n");
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qemu_chr_printf(chr, "+--------+\r\n");
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qemu_chr_printf(chr, "\n");
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qemu_chr_printf(chr, "Malta ASCII\r\n");
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qemu_chr_printf(chr, "+--------+\r\n");
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qemu_chr_printf(chr, "+ +\r\n");
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qemu_chr_printf(chr, "+--------+\r\n");
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}
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static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
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@ -436,19 +453,9 @@ static MaltaFPGAState *malta_fpga_init(target_phys_addr_t base, CPUState *env)
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/* 0xa00 is less than a page, so will still get the right offsets. */
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cpu_register_physical_memory(base + 0xa00, 0x100000 - 0xa00, malta);
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s->display = qemu_chr_open("fpga", "vc:320x200");
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qemu_chr_printf(s->display, "\e[HMalta LEDBAR\r\n");
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qemu_chr_printf(s->display, "+--------+\r\n");
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qemu_chr_printf(s->display, "+ +\r\n");
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qemu_chr_printf(s->display, "+--------+\r\n");
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qemu_chr_printf(s->display, "\n");
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qemu_chr_printf(s->display, "Malta ASCII\r\n");
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qemu_chr_printf(s->display, "+--------+\r\n");
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qemu_chr_printf(s->display, "+ +\r\n");
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qemu_chr_printf(s->display, "+--------+\r\n");
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s->display = qemu_chr_open("fpga", "vc:320x200", malta_fpga_led_init);
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uart_chr = qemu_chr_open("cbus", "vc:80Cx24C");
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qemu_chr_printf(uart_chr, "CBUS UART\r\n");
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uart_chr = qemu_chr_open("cbus", "vc:80Cx24C", malta_fpga_uart_init);
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s->uart =
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serial_mm_init(base + 0x900, 3, env->irq[2], 230400, uart_chr, 1);
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