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hw/intc/arm_gicv3: Implement GICv3 redistributor registers
Implement the redistributor registers of a GICv3. Signed-off-by: Shlomo Pongratz <shlomo.pongratz@huawei.com> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1465915112-29272-13-git-send-email-peter.maydell@linaro.org [PMM: significantly overhauled/rewritten: * use the new data structures * restructure register read/write to handle different width accesses natively, since almost all registers are 32-bit only, rather than implementing everything as byte accesses * implemented security extension support ] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -15,6 +15,7 @@ common-obj-$(CONFIG_ARM_GIC) += arm_gicv2m.o
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common-obj-$(CONFIG_ARM_GIC) += arm_gicv3_common.o
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common-obj-$(CONFIG_ARM_GIC) += arm_gicv3.o
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common-obj-$(CONFIG_ARM_GIC) += arm_gicv3_dist.o
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common-obj-$(CONFIG_ARM_GIC) += arm_gicv3_redist.o
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common-obj-$(CONFIG_OPENPIC) += openpic.o
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obj-$(CONFIG_APIC) += apic.o apic_common.o
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