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target/arm: Replace A64 get_fpstatus_ptr() with generic fpstatus_ptr()
We currently have two versions of get_fpstatus_ptr(), which both take an effectively boolean argument: * the one for A64 takes "bool is_f16" to distinguish fp16 from other ops * the one for A32/T32 takes "int neon" to distinguish Neon from other ops This is confusing, and to implement ARMv8.2-FP16 the A32/T32 one will need to make a four-way distinction between "non-Neon, FP16", "non-Neon, single/double", "Neon, FP16" and "Neon, single/double". The A64 version will then be a strict subset of the A32/T32 version. To clean this all up, we want to go to a single implementation which takes an enum argument with values FPST_FPCR, FPST_STD, FPST_FPCR_F16, and FPST_STD_F16. We rename the function to fpstatus_ptr() so that unconverted code gets a compilation error rather than silently passing the wrong thing to the new function. This commit implements that new API, and converts A64 to use it: get_fpstatus_ptr(false) -> fpstatus_ptr(FPST_FPCR) get_fpstatus_ptr(true) -> fpstatus_ptr(FPST_FPCR_F16) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200806104453.30393-2-peter.maydell@linaro.org
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4 changed files with 103 additions and 72 deletions
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@ -37,7 +37,6 @@ TCGv_i64 cpu_reg_sp(DisasContext *s, int reg);
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TCGv_i64 read_cpu_reg(DisasContext *s, int reg, int sf);
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TCGv_i64 read_cpu_reg_sp(DisasContext *s, int reg, int sf);
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void write_fp_dreg(DisasContext *s, int reg, TCGv_i64 v);
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TCGv_ptr get_fpstatus_ptr(bool);
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bool logic_imm_decode_wmask(uint64_t *result, unsigned int immn,
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unsigned int imms, unsigned int immr);
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bool sve_access_check(DisasContext *s);
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