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x86: Support XFD and AMX xsave data migration
XFD(eXtended Feature Disable) allows to enable a feature on xsave state while preventing specific user threads from using the feature. Support save and restore XFD MSRs if CPUID.D.1.EAX[4] enumerate to be valid. Likewise migrate the MSRs and related xsave state necessarily. Signed-off-by: Zeng Guang <guang.zeng@intel.com> Signed-off-by: Wei Wang <wei.w.wang@intel.com> Signed-off-by: Yang Zhong <yang.zhong@intel.com> Message-Id: <20220217060434.52460-8-yang.zhong@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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3 changed files with 73 additions and 0 deletions
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@ -507,6 +507,9 @@ typedef enum X86Seg {
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#define MSR_VM_HSAVE_PA 0xc0010117
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#define MSR_IA32_XFD 0x000001c4
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#define MSR_IA32_XFD_ERR 0x000001c5
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#define MSR_IA32_BNDCFGS 0x00000d90
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#define MSR_IA32_XSS 0x00000da0
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#define MSR_IA32_UMWAIT_CONTROL 0xe1
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@ -872,6 +875,8 @@ typedef uint64_t FeatureWordArray[FEATURE_WORDS];
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#define CPUID_7_1_EAX_AVX_VNNI (1U << 4)
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/* AVX512 BFloat16 Instruction */
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#define CPUID_7_1_EAX_AVX512_BF16 (1U << 5)
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/* XFD Extend Feature Disabled */
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#define CPUID_D_1_EAX_XFD (1U << 4)
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/* Packets which contain IP payload have LIP values */
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#define CPUID_14_0_ECX_LIP (1U << 31)
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@ -1616,6 +1621,10 @@ typedef struct CPUArchState {
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uint64_t msr_rtit_cr3_match;
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uint64_t msr_rtit_addrs[MAX_RTIT_ADDRS];
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/* Per-VCPU XFD MSRs */
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uint64_t msr_xfd;
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uint64_t msr_xfd_err;
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/* exception/interrupt handling */
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int error_code;
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int exception_is_int;
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