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ppc/pnv: Implement the ChipTOD to Core transfer
One of the functions of the ChipTOD is to transfer TOD to the Core (aka PC - Pervasive Core) timebase facility. The ChipTOD can be programmed with a target address to send the TOD value to. The hardware implementation seems to perform this by sending the TOD value to a SCOM address. This implementation grabs the core directly and manipulates the timebase facility state in the core. This is a hack, but it works enough for now. A better implementation would implement the transfer to the PnvCore xscom register and drive the timebase state machine from there. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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@ -1183,6 +1183,13 @@ DEXCR_ASPECT(SRAPD, 4)
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DEXCR_ASPECT(NPHIE, 5)
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DEXCR_ASPECT(PHIE, 6)
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/*****************************************************************************/
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/* PowerNV ChipTOD and TimeBase State Machine */
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struct pnv_tod_tbst {
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int tb_ready_for_tod; /* core TB ready to receive TOD from chiptod */
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int tod_sent_to_tb; /* chiptod sent TOD to the core TB */
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};
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/*****************************************************************************/
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/* The whole PowerPC CPU context */
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@ -1258,6 +1265,12 @@ struct CPUArchState {
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uint32_t tlb_need_flush; /* Delayed flush needed */
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#define TLB_NEED_LOCAL_FLUSH 0x1
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#define TLB_NEED_GLOBAL_FLUSH 0x2
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#if defined(TARGET_PPC64)
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/* PowerNV chiptod / timebase facility state. */
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/* Would be nice to put these into PnvCore */
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struct pnv_tod_tbst pnv_tod_tbst;
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#endif
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#endif
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/* Other registers */
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