motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 08:13:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target-xtensa: add gdb support

Browse source 
Specific xtensa processor overlay for GDB contains register map in
the gdb/xtensa-config.c. This description is used by the GDB to e.g.
parse 'g' response packets and it may be reused in the qemu's gdbstub
(only XTREG definitions for non-pseudoregisters are needed).

Currently mainline GDB does not support operations with privileged SRs
(see http://sourceware.org/ml/gdb/2011-07/msg00075.html). This support
may be enabled, see NUM_CORE_REGS comment in the gdbstub.c

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Max Filippov 2011-09-06 03:55:52 +04:00 • committed by Blue Swirl
parent 97836ceed3
commit ccfcaba6fd
4 changed files with 496 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

11
target-xtensa/helper.c
View file

@ -34,6 +34,10 @@
#include "hw/loader.h"
#endif
#define XTREG(idx, ofs, bi, sz, al, no, flags, cp, typ, grp, name, \
a1, a2, a3, a4, a5, a6) \
{ .targno = (no), .type = (typ), .group = (grp) },
void cpu_reset(CPUXtensaState *env)
{
env->exception_taken = 0;
@ -52,6 +56,13 @@ static const XtensaConfig core_config[] = {
.options = -1 ^
(XTENSA_OPTION_BIT(XTENSA_OPTION_HW_ALIGNMENT) |
XTENSA_OPTION_BIT(XTENSA_OPTION_MMU)),
.gdb_regmap = {
.num_regs = 176,
.num_core_regs = 117,
.reg = {
#include "gdb-config-sample-xtensa-core.c"
}
},
.nareg = 64,
.ndepc = 1,
.excm_level = 16,