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s390x: spelling fixes

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Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Michael Tokarev 2023-07-14 14:20:07 +03:00
parent d8b71d96b3
commit cced0d6539
9 changed files with 9 additions and 9 deletions
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2
target/s390x/cpu_features.c
View file

@ -249,7 +249,7 @@ static void init_groups(void)
{
int i;
/* init all bitmaps from gnerated data initially */
/* init all bitmaps from generated data initially */
for (i = 0; i < ARRAY_SIZE(s390_feature_groups); i++) {
s390_init_feat_bitmap(s390_feature_groups[i].init,
s390_feature_groups[i].feat);

2
target/s390x/cpu_models.c
View file

@ -975,7 +975,7 @@ static void register_types(void)
init_ignored_base_feat();
/* init all bitmaps from gnerated data initially */
/* init all bitmaps from generated data initially */
s390_init_feat_bitmap(qemu_max_init, qemu_max_cpu_feat);
for (i = 0; i < ARRAY_SIZE(s390_cpu_defs); i++) {
s390_init_feat_bitmap(s390_cpu_defs[i].base_init,

2
target/s390x/tcg/fpu_helper.c
View file

@ -87,7 +87,7 @@ static void handle_exceptions(CPUS390XState *env, bool XxC, uintptr_t retaddr)
/*
* FIXME:
* 1. Right now, all inexact conditions are inidicated as
* 1. Right now, all inexact conditions are indicated as
* "truncated" (0) and never as "incremented" (1) in the DXC.
* 2. Only traps due to invalid/divbyzero are suppressing. Other traps
* are completing, meaning the target register has to be written!

2
target/s390x/tcg/insn-data.h.inc
View file

@ -529,7 +529,7 @@
/* LOAD LOGICAL HALFWORD RELATIVE LONG */
C(0xc402, LLHRL, RIL_b, GIE, 0, ri2, new, r1_32, ld16u, 0)
C(0xc406, LLGHRL, RIL_b, GIE, 0, ri2, r1, 0, ld16u, 0)
/* LOAD LOGICAL IMMEDATE */
/* LOAD LOGICAL IMMEDIATE */
D(0xc00e, LLIHF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 32)
D(0xc00f, LLILF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 0)
D(0xa50c, LLIHH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 48)

2
target/s390x/tcg/translate.c
View file

@ -429,7 +429,7 @@ static void gen_exception(int excp)
static void gen_program_exception(DisasContext *s, int code)
{
/* Remember what pgm exeption this was. */
/* Remember what pgm exception this was. */
tcg_gen_st_i32(tcg_constant_i32(code), cpu_env,
offsetof(CPUS390XState, int_pgm_code));