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Add nuvoton sd module for NPCM7XX
Add gdb-xml for MVE More uses of tcg_constant_* in target/arm Fix parameter naming for default-bus-bypass-iommu Ignore cache operations to mmio in HVF -----BEGIN PGP SIGNATURE----- iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmGBgjkdHHJpY2hhcmQu aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8sAAgAsHaW2sHH/W4TzCwl DfqFar4u047Q+ZtQHjNehGHF9Bxp4NS4A0qL52vk0hVoqeWlyF1N29MOnewgVDqY q1x+uxJtG9xjTse7oEEshEEFF/7J8eB8dN4E78TFn/6IhvVhGiUeeRu29s44Ot6N E2KABcXfd+4gEdqhepLGEbi5n0TnA8ARmmeffZNWVEbsxQjHnMQQYmqGmllB3xV3 qPpnp3avvD1015zMwrLVmlDO+tSRr/1bed7k3k26ebga2B/zitxcpXFNCDlgePx0 LNT5QYvBDpE7HOruGQjf4iXPJHfYw5VMtopK7K++rY9KWiJgBVSjQUcB462sdCPk wNAp0g== =vlZ5 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into staging Add nuvoton sd module for NPCM7XX Add gdb-xml for MVE More uses of tcg_constant_* in target/arm Fix parameter naming for default-bus-bypass-iommu Ignore cache operations to mmio in HVF # gpg: Signature made Tue 02 Nov 2021 02:23:53 PM EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * remotes/rth/tags/pull-arm-20211102-2: hvf: arm: Ignore cache operations on MMIO hw/arm/virt: Rename default_bus_bypass_iommu target/arm: Use tcg_constant_i32() in gen_rev16() target/arm: Use tcg_constant_i64() in do_sat_addsub_64() target/arm: Use the constant variant of store_cpu_field() when possible target/arm: Introduce store_cpu_field_constant() helper target/arm: Use tcg_constant_i32() in op_smlad() target/arm: Advertise MVE to gdb when present tests/qtest/libqos: add SDHCI commands hw/arm: Attach MMC to quanta-gbs-bmc hw/arm: Add Nuvoton SD module to board hw/sd: add nuvoton MMC Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
commit
cc23377516
20 changed files with 544 additions and 35 deletions
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@ -35,6 +35,7 @@
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#include "hw/usb/hcd-ehci.h"
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#include "hw/usb/hcd-ohci.h"
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#include "target/arm/cpu.h"
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#include "hw/sd/npcm7xx_sdhci.h"
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#define NPCM7XX_MAX_NUM_CPUS (2)
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@ -103,6 +104,7 @@ typedef struct NPCM7xxState {
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OHCISysBusState ohci;
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NPCM7xxFIUState fiu[2];
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NPCM7xxEMCState emc[2];
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NPCM7xxSDHCIState mmc;
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} NPCM7xxState;
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#define TYPE_NPCM7XX "npcm7xx"
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65
include/hw/sd/npcm7xx_sdhci.h
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65
include/hw/sd/npcm7xx_sdhci.h
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/*
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* NPCM7xx SD-3.0 / eMMC-4.51 Host Controller
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*
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* Copyright (c) 2021 Google LLC
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#ifndef NPCM7XX_SDHCI_H
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#define NPCM7XX_SDHCI_H
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#include "hw/sd/sdhci.h"
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#include "qom/object.h"
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#define TYPE_NPCM7XX_SDHCI "npcm7xx.sdhci"
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#define NPCM7XX_PRSTVALS_SIZE 6
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#define NPCM7XX_PRSTVALS 0x60
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#define NPCM7XX_PRSTVALS_0 0x0
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#define NPCM7XX_PRSTVALS_1 0x2
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#define NPCM7XX_PRSTVALS_2 0x4
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#define NPCM7XX_PRSTVALS_3 0x6
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#define NPCM7XX_PRSTVALS_4 0x8
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#define NPCM7XX_PRSTVALS_5 0xA
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#define NPCM7XX_BOOTTOCTRL 0x10
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#define NPCM7XX_SDHCI_REGSIZE 0x20
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#define NPCM7XX_PRSNTS_RESET 0x04A00000
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#define NPCM7XX_BLKGAP_RESET 0x80
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#define NPCM7XX_CAPAB_RESET 0x0100200161EE0399
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#define NPCM7XX_MAXCURR_RESET 0x0000000000000005
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#define NPCM7XX_HCVER_RESET 0x1002
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#define NPCM7XX_PRSTVALS_0_RESET 0x0040
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#define NPCM7XX_PRSTVALS_1_RESET 0x0001
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#define NPCM7XX_PRSTVALS_3_RESET 0x0001
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OBJECT_DECLARE_SIMPLE_TYPE(NPCM7xxSDHCIState, NPCM7XX_SDHCI)
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typedef struct NPCM7xxRegs {
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/* Preset Values Register Field, read-only */
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uint16_t prstvals[NPCM7XX_PRSTVALS_SIZE];
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/* Boot Timeout Control Register, read-write */
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uint32_t boottoctrl;
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} NPCM7xxRegisters;
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typedef struct NPCM7xxSDHCIState {
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SysBusDevice parent;
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MemoryRegion container;
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MemoryRegion iomem;
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BusState *bus;
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NPCM7xxRegisters regs;
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SDHCIState sdhci;
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} NPCM7xxSDHCIState;
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#endif /* NPCM7XX_SDHCI_H */
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