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hw/arm: Model TCMs in the SSE-300, not the AN547

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The SSE-300 has an ITCM at 0x0000_0000 and a DTCM at 0x2000_0000.
Currently we model these in the AN547 board, but this is conceptually
wrong, because they are a part of the SSE-300 itself. Move the
modelling of the TCMs out of mps2-tz.c into sse300.c.

This has no guest-visible effects.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210510190844.17799-7-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2021-05-10 20:08:44 +01:00
parent 2f12dca059
commit cbb5638877
3 changed files with 21 additions and 12 deletions
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2
include/hw/arm/armsse.h
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@ -198,6 +198,8 @@ struct ARMSSE {
MemoryRegion alias2;
MemoryRegion alias3[SSE_MAX_CPUS];
MemoryRegion sram[MAX_SRAM_BANKS];
MemoryRegion itcm;
MemoryRegion dtcm;
qemu_irq *exp_irqs[SSE_MAX_CPUS];
qemu_irq ppc0_irq;