ppc patch queue for 2023-03-03:

This queue includes a stub implementation for the dcblc instruction to
 avoid an illegal instrunction exception when using u-boot with mpc85xx.
 It also includes a PHB fix with user-created pnv-phb devices and
 Skiboot.
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Merge tag 'pull-ppc-20230303' of https://gitlab.com/danielhb/qemu into staging

ppc patch queue for 2023-03-03:

This queue includes a stub implementation for the dcblc instruction to
avoid an illegal instrunction exception when using u-boot with mpc85xx.
It also includes a PHB fix with user-created pnv-phb devices and
Skiboot.

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# gpg: Signature made Fri 03 Mar 2023 21:24:38 GMT
# gpg:                using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164
# gpg:                issuer "danielhb413@gmail.com"
# gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
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* tag 'pull-ppc-20230303' of https://gitlab.com/danielhb/qemu:
  pnv_phb4_pec: Simplify/align code to parent user-created PHBs
  pnv_phb4_pec: Move pnv_phb4_get_pec() to rightful file
  pnv_phb4_pec: Only export existing PHBs to the device tree
  pnv_phb4_pec: Keep track of instantiated PHBs
  target/ppc/translate: Add dummy implementation for dcblc instruction

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2023-03-04 14:01:34 +00:00
commit ca30a985e9
6 changed files with 85 additions and 71 deletions

View file

@ -157,6 +157,7 @@ struct PnvPHB4 {
void pnv_phb4_pic_print_info(PnvPHB4 *phb, Monitor *mon);
int pnv_phb4_pec_get_phb_id(PnvPhb4PecState *pec, int stack_index);
PnvPhb4PecState *pnv_pec_add_phb(PnvChip *chip, PnvPHB *phb, Error **errp);
void pnv_phb4_bus_init(DeviceState *dev, PnvPHB4 *phb);
extern const MemoryRegionOps pnv_phb4_xscom_ops;
@ -185,6 +186,8 @@ struct PnvPhb4PecState {
/* PHBs */
uint32_t num_phbs;
#define MAX_PHBS_PER_PEC 3
PnvPHB *phbs[MAX_PHBS_PER_PEC];
PnvChip *chip;
};

View file

@ -100,7 +100,7 @@ struct PnvMachineState {
};
PnvChip *pnv_get_chip(PnvMachineState *pnv, uint32_t chip_id);
Object *pnv_chip_add_phb(PnvChip *chip, PnvPHB *phb, Error **errp);
PnvChip *pnv_chip_add_phb(PnvChip *chip, PnvPHB *phb);
#define PNV_FDT_ADDR 0x01000000
#define PNV_TIMEBASE_FREQ 512000000ULL