mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-07-26 20:03:54 -06:00
cpus: Register VMState per user / system emulation
Simplify cpu-target.c by extracting mixed vmstate code into the cpu_vmstate_register() / cpu_vmstate_unregister() helpers, implemented in cpu-user.c and cpu-system.c. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20250123234415.59850-20-philmd@linaro.org>
This commit is contained in:
parent
1405d7e60d
commit
ca05578fc8
4 changed files with 131 additions and 119 deletions
121
cpu-target.c
121
cpu-target.c
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@ -21,115 +21,17 @@
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#include "qapi/error.h"
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#include "qapi/error.h"
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#include "qemu/error-report.h"
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#include "qemu/error-report.h"
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#include "qemu/qemu-print.h"
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#include "qemu/qemu-print.h"
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#include "migration/vmstate.h"
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#ifndef CONFIG_USER_ONLY
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#include "hw/core/sysemu-cpu-ops.h"
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#endif
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#include "system/accel-ops.h"
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#include "system/accel-ops.h"
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#include "system/cpus.h"
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#include "system/cpus.h"
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#include "system/tcg.h"
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#include "exec/tswap.h"
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#include "exec/tswap.h"
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#include "exec/replay-core.h"
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#include "exec/replay-core.h"
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#include "exec/cpu-common.h"
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#include "exec/cpu-common.h"
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#include "exec/cputlb.h"
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#include "exec/exec-all.h"
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#include "exec/tb-flush.h"
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#include "exec/log.h"
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#include "exec/log.h"
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#include "accel/accel-cpu-target.h"
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#include "accel/accel-cpu-target.h"
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#include "trace/trace-root.h"
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#include "trace/trace-root.h"
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#include "qemu/accel.h"
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#include "qemu/accel.h"
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#include "hw/core/cpu.h"
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#include "hw/core/cpu.h"
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#ifndef CONFIG_USER_ONLY
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static int cpu_common_post_load(void *opaque, int version_id)
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{
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if (tcg_enabled()) {
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CPUState *cpu = opaque;
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/*
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* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
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* version_id is increased.
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*/
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cpu->interrupt_request &= ~0x01;
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tlb_flush(cpu);
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/*
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* loadvm has just updated the content of RAM, bypassing the
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* usual mechanisms that ensure we flush TBs for writes to
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* memory we've translated code from. So we must flush all TBs,
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* which will now be stale.
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*/
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tb_flush(cpu);
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}
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return 0;
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}
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static int cpu_common_pre_load(void *opaque)
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{
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CPUState *cpu = opaque;
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cpu->exception_index = -1;
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return 0;
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}
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static bool cpu_common_exception_index_needed(void *opaque)
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{
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CPUState *cpu = opaque;
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return tcg_enabled() && cpu->exception_index != -1;
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}
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static const VMStateDescription vmstate_cpu_common_exception_index = {
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.name = "cpu_common/exception_index",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = cpu_common_exception_index_needed,
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.fields = (const VMStateField[]) {
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VMSTATE_INT32(exception_index, CPUState),
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VMSTATE_END_OF_LIST()
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}
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};
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static bool cpu_common_crash_occurred_needed(void *opaque)
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{
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CPUState *cpu = opaque;
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return cpu->crash_occurred;
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}
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static const VMStateDescription vmstate_cpu_common_crash_occurred = {
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.name = "cpu_common/crash_occurred",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = cpu_common_crash_occurred_needed,
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.fields = (const VMStateField[]) {
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VMSTATE_BOOL(crash_occurred, CPUState),
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VMSTATE_END_OF_LIST()
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}
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};
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const VMStateDescription vmstate_cpu_common = {
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.name = "cpu_common",
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.version_id = 1,
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.minimum_version_id = 1,
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.pre_load = cpu_common_pre_load,
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.post_load = cpu_common_post_load,
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(halted, CPUState),
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VMSTATE_UINT32(interrupt_request, CPUState),
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VMSTATE_END_OF_LIST()
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},
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.subsections = (const VMStateDescription * const []) {
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&vmstate_cpu_common_exception_index,
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&vmstate_cpu_common_crash_occurred,
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NULL
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}
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};
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#endif
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bool cpu_exec_realizefn(CPUState *cpu, Error **errp)
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bool cpu_exec_realizefn(CPUState *cpu, Error **errp)
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{
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{
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if (!accel_cpu_common_realize(cpu, errp)) {
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if (!accel_cpu_common_realize(cpu, errp)) {
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@ -139,33 +41,14 @@ bool cpu_exec_realizefn(CPUState *cpu, Error **errp)
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/* Wait until cpu initialization complete before exposing cpu. */
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/* Wait until cpu initialization complete before exposing cpu. */
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cpu_list_add(cpu);
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cpu_list_add(cpu);
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#ifdef CONFIG_USER_ONLY
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cpu_vmstate_register(cpu);
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assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
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qdev_get_vmsd(DEVICE(cpu))->unmigratable);
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#else
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if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
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vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
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}
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if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
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vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu);
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}
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#endif /* CONFIG_USER_ONLY */
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return true;
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return true;
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}
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}
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void cpu_exec_unrealizefn(CPUState *cpu)
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void cpu_exec_unrealizefn(CPUState *cpu)
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{
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{
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#ifndef CONFIG_USER_ONLY
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cpu_vmstate_unregister(cpu);
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CPUClass *cc = CPU_GET_CLASS(cpu);
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if (cc->sysemu_ops->legacy_vmsd != NULL) {
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vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
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}
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if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
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vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
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}
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#endif
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cpu_list_remove(cpu);
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cpu_list_remove(cpu);
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/*
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/*
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@ -21,11 +21,15 @@
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#include "qemu/osdep.h"
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qapi/error.h"
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#include "exec/address-spaces.h"
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#include "exec/address-spaces.h"
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#include "exec/cputlb.h"
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#include "exec/memory.h"
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#include "exec/memory.h"
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#include "exec/tb-flush.h"
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#include "exec/tswap.h"
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#include "exec/tswap.h"
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#include "hw/qdev-core.h"
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#include "hw/qdev-core.h"
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#include "hw/qdev-properties.h"
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#include "hw/qdev-properties.h"
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#include "hw/core/sysemu-cpu-ops.h"
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#include "hw/core/sysemu-cpu-ops.h"
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#include "migration/vmstate.h"
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#include "system/tcg.h"
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bool cpu_paging_enabled(const CPUState *cpu)
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bool cpu_paging_enabled(const CPUState *cpu)
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{
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{
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@ -194,3 +198,114 @@ void cpu_exec_initfn(CPUState *cpu)
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cpu->memory = get_system_memory();
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cpu->memory = get_system_memory();
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object_ref(OBJECT(cpu->memory));
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object_ref(OBJECT(cpu->memory));
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}
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}
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static int cpu_common_post_load(void *opaque, int version_id)
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{
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if (tcg_enabled()) {
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CPUState *cpu = opaque;
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/*
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* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
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* version_id is increased.
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*/
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cpu->interrupt_request &= ~0x01;
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tlb_flush(cpu);
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/*
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* loadvm has just updated the content of RAM, bypassing the
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* usual mechanisms that ensure we flush TBs for writes to
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* memory we've translated code from. So we must flush all TBs,
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* which will now be stale.
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*/
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tb_flush(cpu);
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}
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return 0;
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}
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static int cpu_common_pre_load(void *opaque)
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{
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CPUState *cpu = opaque;
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cpu->exception_index = -1;
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return 0;
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}
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static bool cpu_common_exception_index_needed(void *opaque)
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{
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CPUState *cpu = opaque;
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return tcg_enabled() && cpu->exception_index != -1;
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}
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static const VMStateDescription vmstate_cpu_common_exception_index = {
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.name = "cpu_common/exception_index",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = cpu_common_exception_index_needed,
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.fields = (const VMStateField[]) {
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VMSTATE_INT32(exception_index, CPUState),
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VMSTATE_END_OF_LIST()
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}
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};
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static bool cpu_common_crash_occurred_needed(void *opaque)
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{
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CPUState *cpu = opaque;
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return cpu->crash_occurred;
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}
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static const VMStateDescription vmstate_cpu_common_crash_occurred = {
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.name = "cpu_common/crash_occurred",
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.version_id = 1,
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.minimum_version_id = 1,
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.needed = cpu_common_crash_occurred_needed,
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.fields = (const VMStateField[]) {
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VMSTATE_BOOL(crash_occurred, CPUState),
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VMSTATE_END_OF_LIST()
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}
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};
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const VMStateDescription vmstate_cpu_common = {
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.name = "cpu_common",
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.version_id = 1,
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.minimum_version_id = 1,
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.pre_load = cpu_common_pre_load,
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.post_load = cpu_common_post_load,
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.fields = (const VMStateField[]) {
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VMSTATE_UINT32(halted, CPUState),
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VMSTATE_UINT32(interrupt_request, CPUState),
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VMSTATE_END_OF_LIST()
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},
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.subsections = (const VMStateDescription * const []) {
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&vmstate_cpu_common_exception_index,
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&vmstate_cpu_common_crash_occurred,
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NULL
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}
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};
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void cpu_vmstate_register(CPUState *cpu)
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{
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if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
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vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
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}
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if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
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vmstate_register(NULL, cpu->cpu_index,
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cpu->cc->sysemu_ops->legacy_vmsd, cpu);
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}
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}
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void cpu_vmstate_unregister(CPUState *cpu)
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{
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CPUClass *cc = CPU_GET_CLASS(cpu);
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if (cc->sysemu_ops->legacy_vmsd != NULL) {
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vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
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}
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if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
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vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
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}
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}
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#include "hw/qdev-core.h"
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#include "hw/qdev-core.h"
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#include "hw/qdev-properties.h"
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#include "hw/qdev-properties.h"
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#include "hw/core/cpu.h"
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#include "hw/core/cpu.h"
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#include "migration/vmstate.h"
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static const Property cpu_user_props[] = {
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static const Property cpu_user_props[] = {
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/*
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/*
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{
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{
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/* nothing to do */
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/* nothing to do */
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}
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}
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void cpu_vmstate_register(CPUState *cpu)
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{
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assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
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qdev_get_vmsd(DEVICE(cpu))->unmigratable);
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}
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void cpu_vmstate_unregister(CPUState *cpu)
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{
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/* nothing to do */
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}
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@ -1165,6 +1165,8 @@ G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
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/* $(top_srcdir)/cpu.c */
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/* $(top_srcdir)/cpu.c */
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void cpu_class_init_props(DeviceClass *dc);
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void cpu_class_init_props(DeviceClass *dc);
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void cpu_exec_initfn(CPUState *cpu);
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void cpu_exec_initfn(CPUState *cpu);
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void cpu_vmstate_register(CPUState *cpu);
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void cpu_vmstate_unregister(CPUState *cpu);
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bool cpu_exec_realizefn(CPUState *cpu, Error **errp);
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bool cpu_exec_realizefn(CPUState *cpu, Error **errp);
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void cpu_exec_unrealizefn(CPUState *cpu);
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void cpu_exec_unrealizefn(CPUState *cpu);
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void cpu_exec_reset_hold(CPUState *cpu);
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void cpu_exec_reset_hold(CPUState *cpu);
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