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target/riscv: Allow enabling the Hypervisor extension
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
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@ -258,6 +258,7 @@ typedef struct RISCVCPU {
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bool ext_c;
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bool ext_s;
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bool ext_u;
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bool ext_h;
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bool ext_counters;
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bool ext_ifencei;
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bool ext_icsr;
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