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e500: ppce500_init_mpic() return device instead of IRQ array
Actual number of interrupt pins isn't known in ppce500_init_mpic() so a hardcoded number was used, which causes a crash with older openpic. Instead, return the DeviceState* and change ppce500_init() to call qdev_get_gpio_in() to get only the irq pins which are needed. Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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parent
79b217dedb
commit
c91c187f71
1 changed files with 13 additions and 19 deletions
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@ -729,15 +729,13 @@ static DeviceState *ppce500_init_mpic_kvm(PPCE500Params *params,
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return dev;
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return dev;
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}
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}
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static qemu_irq *ppce500_init_mpic(MachineState *machine, PPCE500Params *params,
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static DeviceState *ppce500_init_mpic(MachineState *machine,
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MemoryRegion *ccsr, qemu_irq **irqs)
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PPCE500Params *params,
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MemoryRegion *ccsr,
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qemu_irq **irqs)
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{
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{
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qemu_irq *mpic;
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DeviceState *dev = NULL;
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DeviceState *dev = NULL;
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SysBusDevice *s;
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SysBusDevice *s;
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int i;
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mpic = g_new0(qemu_irq, 256);
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if (kvm_enabled()) {
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if (kvm_enabled()) {
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Error *err = NULL;
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Error *err = NULL;
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@ -756,15 +754,11 @@ static qemu_irq *ppce500_init_mpic(MachineState *machine, PPCE500Params *params,
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dev = ppce500_init_mpic_qemu(params, irqs);
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dev = ppce500_init_mpic_qemu(params, irqs);
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}
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}
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for (i = 0; i < 256; i++) {
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mpic[i] = qdev_get_gpio_in(dev, i);
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}
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s = SYS_BUS_DEVICE(dev);
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s = SYS_BUS_DEVICE(dev);
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memory_region_add_subregion(ccsr, MPC8544_MPIC_REGS_OFFSET,
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memory_region_add_subregion(ccsr, MPC8544_MPIC_REGS_OFFSET,
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s->mmio[0].memory);
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s->mmio[0].memory);
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return mpic;
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return dev;
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}
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}
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static void ppce500_power_off(void *opaque, int line, int on)
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static void ppce500_power_off(void *opaque, int line, int on)
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@ -796,8 +790,8 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
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/* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and
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/* irq num for pin INTA, INTB, INTC and INTD is 1, 2, 3 and
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* 4 respectively */
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* 4 respectively */
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unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
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unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
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qemu_irq **irqs, *mpic;
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qemu_irq **irqs;
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DeviceState *dev;
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DeviceState *dev, *mpicdev;
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CPUPPCState *firstenv = NULL;
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CPUPPCState *firstenv = NULL;
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MemoryRegion *ccsr_addr_space;
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MemoryRegion *ccsr_addr_space;
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SysBusDevice *s;
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SysBusDevice *s;
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@ -866,18 +860,18 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
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memory_region_add_subregion(address_space_mem, params->ccsrbar_base,
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memory_region_add_subregion(address_space_mem, params->ccsrbar_base,
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ccsr_addr_space);
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ccsr_addr_space);
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mpic = ppce500_init_mpic(machine, params, ccsr_addr_space, irqs);
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mpicdev = ppce500_init_mpic(machine, params, ccsr_addr_space, irqs);
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/* Serial */
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/* Serial */
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if (serial_hds[0]) {
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if (serial_hds[0]) {
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serial_mm_init(ccsr_addr_space, MPC8544_SERIAL0_REGS_OFFSET,
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serial_mm_init(ccsr_addr_space, MPC8544_SERIAL0_REGS_OFFSET,
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0, mpic[42], 399193,
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0, qdev_get_gpio_in(mpicdev, 42), 399193,
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serial_hds[0], DEVICE_BIG_ENDIAN);
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serial_hds[0], DEVICE_BIG_ENDIAN);
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}
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}
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if (serial_hds[1]) {
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if (serial_hds[1]) {
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serial_mm_init(ccsr_addr_space, MPC8544_SERIAL1_REGS_OFFSET,
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serial_mm_init(ccsr_addr_space, MPC8544_SERIAL1_REGS_OFFSET,
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0, mpic[42], 399193,
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0, qdev_get_gpio_in(mpicdev, 42), 399193,
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serial_hds[1], DEVICE_BIG_ENDIAN);
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serial_hds[1], DEVICE_BIG_ENDIAN);
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}
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}
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@ -895,7 +889,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
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qdev_init_nofail(dev);
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qdev_init_nofail(dev);
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s = SYS_BUS_DEVICE(dev);
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s = SYS_BUS_DEVICE(dev);
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for (i = 0; i < PCI_NUM_PINS; i++) {
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for (i = 0; i < PCI_NUM_PINS; i++) {
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sysbus_connect_irq(s, i, mpic[pci_irq_nrs[i]]);
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sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, pci_irq_nrs[i]));
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}
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}
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memory_region_add_subregion(ccsr_addr_space, MPC8544_PCI_REGS_OFFSET,
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memory_region_add_subregion(ccsr_addr_space, MPC8544_PCI_REGS_OFFSET,
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@ -926,7 +920,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
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dev = qdev_create(NULL, "mpc8xxx_gpio");
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dev = qdev_create(NULL, "mpc8xxx_gpio");
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s = SYS_BUS_DEVICE(dev);
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s = SYS_BUS_DEVICE(dev);
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qdev_init_nofail(dev);
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qdev_init_nofail(dev);
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sysbus_connect_irq(s, 0, mpic[MPC8XXX_GPIO_IRQ]);
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sysbus_connect_irq(s, 0, qdev_get_gpio_in(mpicdev, MPC8XXX_GPIO_IRQ));
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memory_region_add_subregion(ccsr_addr_space, MPC8XXX_GPIO_OFFSET,
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memory_region_add_subregion(ccsr_addr_space, MPC8XXX_GPIO_OFFSET,
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sysbus_mmio_get_region(s, 0));
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sysbus_mmio_get_region(s, 0));
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@ -946,7 +940,7 @@ void ppce500_init(MachineState *machine, PPCE500Params *params)
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for (i = 0; i < params->platform_bus_num_irqs; i++) {
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for (i = 0; i < params->platform_bus_num_irqs; i++) {
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int irqn = params->platform_bus_first_irq + i;
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int irqn = params->platform_bus_first_irq + i;
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sysbus_connect_irq(s, i, mpic[irqn]);
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sysbus_connect_irq(s, i, qdev_get_gpio_in(mpicdev, irqn));
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}
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}
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memory_region_add_subregion(address_space_mem,
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memory_region_add_subregion(address_space_mem,
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