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hw/intc/arm_gicv3: Implement gicv3_set_irq()
Implement the code which updates the GIC state when an interrupt input into the GIC is asserted. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1465915112-29272-15-git-send-email-peter.maydell@linaro.org
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5 changed files with 65 additions and 1 deletions
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@ -856,3 +856,24 @@ MemTxResult gicv3_dist_write(void *opaque, hwaddr offset, uint64_t data,
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}
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return r;
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}
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void gicv3_dist_set_irq(GICv3State *s, int irq, int level)
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{
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/* Update distributor state for a change in an external SPI input line */
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if (level == gicv3_gicd_level_test(s, irq)) {
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return;
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}
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trace_gicv3_dist_set_irq(irq, level);
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gicv3_gicd_level_replace(s, irq, level);
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if (level) {
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/* 0->1 edges latch the pending bit for edge-triggered interrupts */
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if (gicv3_gicd_edge_trigger_test(s, irq)) {
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gicv3_gicd_pending_set(s, irq);
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}
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}
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gicv3_update(s, irq, 1);
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}
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