mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-07 09:43:56 -06:00
pc,virtio,pci: fixes and updates
Most notably, this includes the TCO support for ICH: the last feature for 2.4 as we are entering the hard freeze. Bugfixes only from now on. virtio pci also gained cfg access capability - arguably a bugfix since virtio spec makes it mandatory, but it's a big patch. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABAgAGBQJVnO/3AAoJECgfDbjSjVRp6lAH/2RAlzoopHDNMCj5r3wHygnA WD1rjugftcQNJ5HkL1Oe9heQnjUcx4jdaskrTyP8vElY1zheGPYYqtPYjMB3Kfsu fIQUhjhU6lKjF+0Q9QeyOyz9uvHWgTwtiQsHdFj+fsw7qMpiiADgGmlXoin01ZF9 yGaGZ5GcLNEHXGWyzEpKOml1UxtMFZRe649KV1tqLBoOSLdw+c3SzrGvKYjUtGnG luMHPAJcKS7khSTyCVJN8un6SjbC/aB22mlh7TgxeNBANsGJVCH09lLCmczkIKAJ 73sut/+2f2aS9qGaSJiI5ElENDhSlWlSjNG/x4dp07fvurxpojde+bYS9veSo3c= =cQ0D -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging pc,virtio,pci: fixes and updates Most notably, this includes the TCO support for ICH: the last feature for 2.4 as we are entering the hard freeze. Bugfixes only from now on. virtio pci also gained cfg access capability - arguably a bugfix since virtio spec makes it mandatory, but it's a big patch. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Wed Jul 8 10:40:07 2015 BST using RSA key ID D28D5469 # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" * remotes/mst/tags/for_upstream: tco-test: fix up config accesses and re-enable virtio fix cfg endian-ness for BE targets virtio-pci: implement cfg capability virtio: define virtio_pci_cfg_cap in header. pcie: Set the "link active" in the link status register pci_regs.h: import from linux virtio_net: reuse constants from linux hw/i386/pc: don't carry FDC from pc_basic_device_init() to pc_cmos_init() hw/i386/pc: reflect any FDC @ ioport 0x3f0 in the CMOS hw/i386/pc: factor out pc_cmos_init_floppy() ich9: implement strap SPKR pin logic tests: add testcase for TCO watchdog emulation ich9: add TCO interface emulation acpi: split out ICH ACPI support Revert "dataplane: allow virtio-1 devices" dataplane: fix cross-endian issues Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
c8232b39bb
26 changed files with 1943 additions and 811 deletions
129
hw/i386/pc.c
129
hw/i386/pc.c
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@ -293,11 +293,82 @@ static void pc_boot_set(void *opaque, const char *boot_device, Error **errp)
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set_boot_dev(opaque, boot_device, errp);
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}
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static void pc_cmos_init_floppy(ISADevice *rtc_state, ISADevice *floppy)
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{
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int val, nb, i;
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FDriveType fd_type[2] = { FDRIVE_DRV_NONE, FDRIVE_DRV_NONE };
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/* floppy type */
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if (floppy) {
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for (i = 0; i < 2; i++) {
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fd_type[i] = isa_fdc_get_drive_type(floppy, i);
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}
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}
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val = (cmos_get_fd_drive_type(fd_type[0]) << 4) |
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cmos_get_fd_drive_type(fd_type[1]);
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rtc_set_memory(rtc_state, 0x10, val);
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val = rtc_get_memory(rtc_state, REG_EQUIPMENT_BYTE);
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nb = 0;
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if (fd_type[0] < FDRIVE_DRV_NONE) {
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nb++;
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}
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if (fd_type[1] < FDRIVE_DRV_NONE) {
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nb++;
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}
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switch (nb) {
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case 0:
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break;
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case 1:
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val |= 0x01; /* 1 drive, ready for boot */
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break;
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case 2:
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val |= 0x41; /* 2 drives, ready for boot */
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break;
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}
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rtc_set_memory(rtc_state, REG_EQUIPMENT_BYTE, val);
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}
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typedef struct pc_cmos_init_late_arg {
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ISADevice *rtc_state;
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BusState *idebus[2];
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} pc_cmos_init_late_arg;
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typedef struct check_fdc_state {
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ISADevice *floppy;
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bool multiple;
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} CheckFdcState;
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static int check_fdc(Object *obj, void *opaque)
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{
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CheckFdcState *state = opaque;
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Object *fdc;
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uint32_t iobase;
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Error *local_err = NULL;
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fdc = object_dynamic_cast(obj, TYPE_ISA_FDC);
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if (!fdc) {
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return 0;
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}
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iobase = object_property_get_int(obj, "iobase", &local_err);
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if (local_err || iobase != 0x3f0) {
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error_free(local_err);
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return 0;
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}
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if (state->floppy) {
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state->multiple = true;
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} else {
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state->floppy = ISA_DEVICE(obj);
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}
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return 0;
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}
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static const char * const fdc_container_path[] = {
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"/unattached", "/peripheral", "/peripheral-anon"
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};
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static void pc_cmos_init_late(void *opaque)
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{
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pc_cmos_init_late_arg *arg = opaque;
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@ -306,6 +377,8 @@ static void pc_cmos_init_late(void *opaque)
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int8_t heads, sectors;
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int val;
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int i, trans;
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Object *container;
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CheckFdcState state = { 0 };
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val = 0;
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if (ide_get_geometry(arg->idebus[0], 0,
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@ -335,16 +408,32 @@ static void pc_cmos_init_late(void *opaque)
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}
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rtc_set_memory(s, 0x39, val);
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/*
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* Locate the FDC at IO address 0x3f0, and configure the CMOS registers
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* accordingly.
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*/
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for (i = 0; i < ARRAY_SIZE(fdc_container_path); i++) {
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container = container_get(qdev_get_machine(), fdc_container_path[i]);
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object_child_foreach(container, check_fdc, &state);
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}
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if (state.multiple) {
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error_report("warning: multiple floppy disk controllers with "
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"iobase=0x3f0 have been found;\n"
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"the one being picked for CMOS setup might not reflect "
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"your intent");
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}
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pc_cmos_init_floppy(s, state.floppy);
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qemu_unregister_reset(pc_cmos_init_late, opaque);
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}
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void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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const char *boot_device, MachineState *machine,
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ISADevice *floppy, BusState *idebus0, BusState *idebus1,
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BusState *idebus0, BusState *idebus1,
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ISADevice *s)
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{
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int val, nb, i;
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FDriveType fd_type[2] = { FDRIVE_DRV_NONE, FDRIVE_DRV_NONE };
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int val;
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static pc_cmos_init_late_arg arg;
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PCMachineState *pc_machine = PC_MACHINE(machine);
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Error *local_err = NULL;
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@ -401,39 +490,12 @@ void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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exit(1);
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}
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/* floppy type */
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if (floppy) {
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for (i = 0; i < 2; i++) {
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fd_type[i] = isa_fdc_get_drive_type(floppy, i);
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}
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}
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val = (cmos_get_fd_drive_type(fd_type[0]) << 4) |
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cmos_get_fd_drive_type(fd_type[1]);
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rtc_set_memory(s, 0x10, val);
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val = 0;
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nb = 0;
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if (fd_type[0] < FDRIVE_DRV_NONE) {
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nb++;
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}
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if (fd_type[1] < FDRIVE_DRV_NONE) {
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nb++;
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}
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switch (nb) {
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case 0:
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break;
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case 1:
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val |= 0x01; /* 1 drive, ready for boot */
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break;
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case 2:
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val |= 0x41; /* 2 drives, ready for boot */
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break;
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}
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val |= 0x02; /* FPU is there */
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val |= 0x04; /* PS/2 mouse installed */
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rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
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/* hard drives */
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/* hard drives and FDC */
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arg.rtc_state = s;
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arg.idebus[0] = idebus0;
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arg.idebus[1] = idebus1;
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@ -1401,7 +1463,6 @@ static const MemoryRegionOps ioportF0_io_ops = {
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void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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ISADevice **rtc_state,
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bool create_fdctrl,
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ISADevice **floppy,
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bool no_vmport,
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uint32 hpet_irqs)
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{
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@ -1497,7 +1558,9 @@ void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
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fd[i] = drive_get(IF_FLOPPY, 0, i);
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create_fdctrl |= !!fd[i];
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}
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*floppy = create_fdctrl ? fdctrl_init_isa(isa_bus, fd) : NULL;
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if (create_fdctrl) {
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fdctrl_init_isa(isa_bus, fd);
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}
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}
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void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus)
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@ -94,7 +94,6 @@ static void pc_init1(MachineState *machine)
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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BusState *idebus[MAX_IDE_BUS];
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ISADevice *rtc_state;
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ISADevice *floppy;
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MemoryRegion *ram_memory;
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MemoryRegion *pci_memory;
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MemoryRegion *rom_memory;
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@ -241,7 +240,7 @@ static void pc_init1(MachineState *machine)
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}
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/* init basic PC hardware */
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pc_basic_device_init(isa_bus, gsi, &rtc_state, true, &floppy,
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pc_basic_device_init(isa_bus, gsi, &rtc_state, true,
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(pc_machine->vmport != ON_OFF_AUTO_ON), 0x4);
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pc_nic_init(isa_bus, pci_bus);
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@ -273,7 +272,7 @@ static void pc_init1(MachineState *machine)
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}
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pc_cmos_init(below_4g_mem_size, above_4g_mem_size, machine->boot_order,
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machine, floppy, idebus[0], idebus[1], rtc_state);
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machine, idebus[0], idebus[1], rtc_state);
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if (pci_enabled && usb_enabled()) {
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pci_create_simple(pci_bus, piix3_devfn + 2, "piix3-usb-uhci");
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@ -73,7 +73,6 @@ static void pc_q35_init(MachineState *machine)
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PCIDevice *lpc;
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BusState *idebus[MAX_SATA_PORTS];
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ISADevice *rtc_state;
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ISADevice *floppy;
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MemoryRegion *pci_memory;
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MemoryRegion *rom_memory;
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MemoryRegion *ram_memory;
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}
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/* init basic PC hardware */
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pc_basic_device_init(isa_bus, gsi, &rtc_state, !mc->no_floppy, &floppy,
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pc_basic_device_init(isa_bus, gsi, &rtc_state, !mc->no_floppy,
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(pc_machine->vmport != ON_OFF_AUTO_ON), 0xff0104);
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/* connect pm stuff to lpc */
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ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pc_machine));
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ich9_lpc_pm_init(lpc, pc_machine_is_smm_enabled(pc_machine), !mc->no_tco);
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/* ahci and SATA device, for q35 1 ahci controller is built-in */
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ahci = pci_create_simple_multifunction(host_bus,
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8, NULL, 0);
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pc_cmos_init(below_4g_mem_size, above_4g_mem_size, machine->boot_order,
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machine, floppy, idebus[0], idebus[1], rtc_state);
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machine, idebus[0], idebus[1], rtc_state);
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/* the rest devices to which pci devfn is automatically assigned */
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pc_vga_init(isa_bus, host_bus);
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m->default_machine_opts = "firmware=bios-256k.bin";
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m->default_display = "std";
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m->no_floppy = 1;
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m->no_tco = 0;
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m->alias = "q35";
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}
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@ -410,6 +410,7 @@ static void pc_q35_2_3_machine_options(MachineClass *m)
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{
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pc_q35_2_4_machine_options(m);
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m->no_floppy = 0;
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m->no_tco = 1;
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m->alias = NULL;
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SET_MACHINE_COMPAT(m, PC_COMPAT_2_3);
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}
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