target/openrisc: Move VR, UPR, DMMCFGR, IMMCFGR to cpu init

These registers are read-only and implementation specific.
Initiailize VR for the first time; take the OR1200 values
from the verilog source.

Note that moving fields within CPUOpenRISCState does not
affect migration.

Reviewed-by: Stafford Horne <shorne@gmail.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2019-08-25 15:02:54 -07:00
parent b72e3ff658
commit c7efab4fc1
3 changed files with 22 additions and 13 deletions

View file

@ -260,10 +260,6 @@ typedef struct CPUOpenRISCState {
target_ulong sr_cy; /* the SR_CY bit, values 0, 1. */
target_long sr_ov; /* the SR_OV bit (in the sign bit only) */
uint32_t sr; /* Supervisor register, without SR_{F,CY,OV} */
uint32_t vr; /* Version register */
uint32_t upr; /* Unit presence register */
uint32_t dmmucfgr; /* DMMU configure register */
uint32_t immucfgr; /* IMMU configure register */
uint32_t esr; /* Exception supervisor register */
uint32_t evbar; /* Exception vector base address register */
uint32_t pmr; /* Power Management Register */
@ -283,7 +279,11 @@ typedef struct CPUOpenRISCState {
struct {} end_reset_fields;
/* Fields from here on are preserved across CPU reset. */
uint32_t vr; /* Version register */
uint32_t upr; /* Unit presence register */
uint32_t cpucfgr; /* CPU configure register */
uint32_t dmmucfgr; /* DMMU configure register */
uint32_t immucfgr; /* IMMU configure register */
#ifndef CONFIG_USER_ONLY
QEMUTimer *timer;