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target-arm queue:

Browse source 
* mark MPS2/MPS3 board-internal i2c buses as 'full' so that command
    line user-created devices are not plugged into them
  * Take an exception if PSTATE.IL is set
  * Support an emulated ITS in the virt board
  * Add support for kudo-bmc board
  * Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM
  * cadence_uart: Fix clock handling issues that prevented
    u-boot from running
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210913-3' into staging

target-arm queue:
 * mark MPS2/MPS3 board-internal i2c buses as 'full' so that command
   line user-created devices are not plugged into them
 * Take an exception if PSTATE.IL is set
 * Support an emulated ITS in the virt board
 * Add support for kudo-bmc board
 * Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM
 * cadence_uart: Fix clock handling issues that prevented
   u-boot from running

# gpg: Signature made Mon 13 Sep 2021 21:04:52 BST
# gpg:                using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg:                issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210913-3: (23 commits)
  hw/arm/mps2.c: Mark internal-only I2C buses as 'full'
  hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full'
  hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn
  qdev: Support marking individual buses as 'full'
  target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn
  target/arm: Take an exception if PSTATE.IL is set
  tests/data/acpi/virt: Update IORT files for ITS
  hw/arm/virt: add ITS support in virt GIC
  tests/data/acpi/virt: Add IORT files for ITS
  hw/intc: GICv3 redistributor ITS processing
  hw/intc: GICv3 ITS Feature enablement
  hw/intc: GICv3 ITS Command processing
  hw/intc: GICv3 ITS command queue framework
  hw/intc: GICv3 ITS register definitions added
  hw/intc: GICv3 ITS initial framework
  hw/arm: Add support for kudo-bmc board.
  hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM
  hw/char: cadence_uart: Log a guest error when device is unclocked or in reset
  hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}()
  hw/char: cadence_uart: Convert to memop_with_attrs() ops
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2021-09-13 21:06:15 +01:00
commit c6f5e042d8
35 changed files with 2144 additions and 210 deletions
Download patch file Download diff file Expand all files Collapse all files

2
include/hw/arm/virt.h
View file

@ -120,6 +120,7 @@ struct VirtMachineClass {
MachineClass parent;
bool disallow_affinity_adjustment;
bool no_its;
bool no_tcg_its;
bool no_pmu;
bool claim_edge_triggered_timers;
bool smbios_old_sys_ver;
@ -141,6 +142,7 @@ struct VirtMachineState {
bool highmem;
bool highmem_ecam;
bool its;
bool tcg_its;
bool virt;
bool ras;
bool mte;

13
include/hw/intc/arm_gicv3_common.h
View file

@ -36,6 +36,8 @@
#define GICV3_MAXIRQ 1020
#define GICV3_MAXSPI (GICV3_MAXIRQ - GIC_INTERNAL)
#define GICV3_LPI_INTID_START 8192
#define GICV3_REDIST_SIZE 0x20000
/* Number of SGI target-list bits */
@ -202,6 +204,13 @@ struct GICv3CPUState {
* real state above; it doesn't need to be migrated.
*/
PendingIrq hppi;
/*
* Cached information recalculated from LPI tables
* in guest memory
*/
PendingIrq hpplpi;
/* This is temporary working state, to avoid a malloc in gicv3_update() */
bool seenbetter;
};
@ -219,6 +228,7 @@ struct GICv3State {
uint32_t num_cpu;
uint32_t num_irq;
uint32_t revision;
bool lpi_enable;
bool security_extn;
bool irq_reset_nonsecure;
bool gicd_no_migration_shift_bug;
@ -226,6 +236,9 @@ struct GICv3State {
int dev_fd; /* kvm device fd if backed by kvm vgic support */
Error *migration_blocker;
MemoryRegion *dma;
AddressSpace dma_as;
/* Distributor */
/* for a GIC with the security extensions the NS banked version of this

32
include/hw/intc/arm_gicv3_its_common.h
View file

@ -25,17 +25,41 @@
#include "hw/intc/arm_gicv3_common.h"
#include "qom/object.h"
#define TYPE_ARM_GICV3_ITS "arm-gicv3-its"
#define ITS_CONTROL_SIZE 0x10000
#define ITS_TRANS_SIZE 0x10000
#define ITS_SIZE (ITS_CONTROL_SIZE + ITS_TRANS_SIZE)
#define GITS_CTLR 0x0
#define GITS_IIDR 0x4
#define GITS_TYPER 0x8
#define GITS_CBASER 0x80
#define GITS_CWRITER 0x88
#define GITS_CREADR 0x90
#define GITS_BASER 0x100
#define GITS_TRANSLATER 0x0040
typedef struct {
bool valid;
bool indirect;
uint16_t entry_sz;
uint32_t page_sz;
uint32_t max_entries;
union {
uint32_t max_devids;
uint32_t max_collids;
} maxids;
uint64_t base_addr;
} TableDesc;
typedef struct {
bool valid;
uint32_t max_entries;
uint64_t base_addr;
} CmdQDesc;
struct GICv3ITSState {
SysBusDevice parent_obj;
@ -52,17 +76,23 @@ struct GICv3ITSState {
/* Registers */
uint32_t ctlr;
uint32_t iidr;
uint64_t typer;
uint64_t cbaser;
uint64_t cwriter;
uint64_t creadr;
uint64_t baser[8];
TableDesc dt;
TableDesc ct;
CmdQDesc cq;
Error *migration_blocker;
};
typedef struct GICv3ITSState GICv3ITSState;
void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops);
void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops,
const MemoryRegionOps *tops);
#define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common"
typedef struct GICv3ITSCommonClass GICv3ITSCommonClass;

24
include/hw/qdev-core.h
View file

@ -264,6 +264,7 @@ struct BusState {
HotplugHandler *hotplug_handler;
int max_index;
bool realized;
bool full;
int num_children;
/*
@ -798,6 +799,29 @@ static inline bool qbus_is_hotpluggable(BusState *bus)
return bus->hotplug_handler;
}
/**
* qbus_mark_full: Mark this bus as full, so no more devices can be attached
* @bus: Bus to mark as full
*
* By default, QEMU will allow devices to be plugged into a bus up
* to the bus class's device count limit. Calling this function
* marks a particular bus as full, so that no more devices can be
* plugged into it. In particular this means that the bus will not
* be considered as a candidate for plugging in devices created by
* the user on the commandline or via the monitor.
* If a machine has multiple buses of a given type, such as I2C,
* where some of those buses in the real hardware are used only for
* internal devices and some are exposed via expansion ports, you
* can use this function to mark the internal-only buses as full
* after you have created all their internal devices. Then user
* created devices will appear on the expansion-port bus where
* guest software expects them.
*/
static inline void qbus_mark_full(BusState *bus)
{
bus->full = true;
}
void device_listener_register(DeviceListener *listener);
void device_listener_unregister(DeviceListener *listener);