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hw/intc/arm_gicv3_its: Implement VINVALL
The VINVALL command should cause any cached information in the ITS or redistributor for the specified vCPU to be dropped or otherwise made consistent with the in-memory LPI configuration tables. Here we implement the command and table parsing, leaving the redistributor part as a stub for the moment, as usual. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20220408141550.1271295-22-peter.maydell@linaro.org
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@ -335,6 +335,7 @@ FIELD(GITS_TYPER, CIL, 36, 1)
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#define GITS_CMD_VMAPP 0x29
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#define GITS_CMD_VMAPTI 0x2A
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#define GITS_CMD_VMAPI 0x2B
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#define GITS_CMD_VINVALL 0x2D
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/* MAPC command fields */
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#define ICID_LENGTH 16
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@ -411,6 +412,9 @@ FIELD(VMOVI_1, VPEID, 32, 16)
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FIELD(VMOVI_2, D, 0, 1)
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FIELD(VMOVI_2, DOORBELL, 32, 32)
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/* VINVALL command fields */
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FIELD(VINVALL_1, VPEID, 32, 16)
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/*
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* 12 bytes Interrupt translation Table Entry size
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* as per Table 5.3 in GICv3 spec
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@ -637,6 +641,15 @@ void gicv3_redist_movall_lpis(GICv3CPUState *src, GICv3CPUState *dest);
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void gicv3_redist_mov_vlpi(GICv3CPUState *src, uint64_t src_vptaddr,
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GICv3CPUState *dest, uint64_t dest_vptaddr,
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int irq, int doorbell);
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/**
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* gicv3_redist_vinvall:
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* @cs: GICv3CPUState
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* @vptaddr: address of VLPI pending table
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*
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* On redistributor @cs, invalidate all cached information associated
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* with the vCPU defined by @vptaddr.
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*/
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void gicv3_redist_vinvall(GICv3CPUState *cs, uint64_t vptaddr);
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void gicv3_redist_send_sgi(GICv3CPUState *cs, int grp, int irq, bool ns);
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void gicv3_init_cpuif(GICv3State *s);
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