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target/riscv: Support pointer masking for RISC-V for i/c/f/d/a types of instructions
Signed-off-by: Alexey Baturo <space.monkey.delivers@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20211025173609.2724490-7-space.monkey.delivers@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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5 changed files with 17 additions and 0 deletions
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@ -25,6 +25,7 @@ static bool gen_lr(DisasContext *ctx, arg_atomic *a, MemOp mop)
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if (a->rl) {
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tcg_gen_mb(TCG_MO_ALL | TCG_BAR_STRL);
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}
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src1 = gen_pm_adjust_address(ctx, src1);
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tcg_gen_qemu_ld_tl(load_val, src1, ctx->mem_idx, mop);
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if (a->aq) {
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tcg_gen_mb(TCG_MO_ALL | TCG_BAR_LDAQ);
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@ -44,6 +45,7 @@ static bool gen_sc(DisasContext *ctx, arg_atomic *a, MemOp mop)
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TCGLabel *l2 = gen_new_label();
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src1 = get_gpr(ctx, a->rs1, EXT_ZERO);
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src1 = gen_pm_adjust_address(ctx, src1);
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tcg_gen_brcond_tl(TCG_COND_NE, load_res, src1, l1);
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/*
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@ -84,6 +86,7 @@ static bool gen_amo(DisasContext *ctx, arg_atomic *a,
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TCGv src1 = get_gpr(ctx, a->rs1, EXT_NONE);
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TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);
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src1 = gen_pm_adjust_address(ctx, src1);
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func(dest, src1, src2, ctx->mem_idx, mop);
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gen_set_gpr(ctx, a->rd, dest);
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