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trivial patches for 2023-09-08

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Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging

trivial patches for 2023-09-08

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# gpg: Signature made Fri 08 Sep 2023 06:09:23 EDT
# gpg:                using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59
# gpg:                issuer "mjt@tls.msk.ru"
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# gpg:                 aka "Michael Tokarev <mjt@corpit.ru>" [full]
# gpg:                 aka "Michael Tokarev <mjt@debian.org>" [full]
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* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: (22 commits)
  qxl: don't assert() if device isn't yet initialized
  hw/net/vmxnet3: Fix guest-triggerable assert()
  tests/qtest/usb-hcd: Remove the empty "init" tests
  target/ppc: use g_free() in test_opcode_table()
  hw/ppc: use g_free() in spapr_tce_table_post_load()
  trivial: Simplify the spots that use TARGET_BIG_ENDIAN as a numeric value
  accel/tcg: Fix typo in translator_io_start() description
  tests/qtest/test-hmp: Fix migrate_set_parameter xbzrle-cache-size test
  docs tests: Fix use of migrate_set_parameter
  qemu-options.hx: Rephrase the descriptions of the -hd* and -cdrom options
  hw/display/xlnx_dp: update comments
  block: spelling fixes
  misc/other: spelling fixes
  qga/: spelling fixes
  tests/: spelling fixes
  scripts/: spelling fixes
  include/: spelling fixes
  audio: spelling fixes
  xen: spelling fix
  riscv: spelling fixes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
This commit is contained in:
Stefan Hajnoczi 2023-09-08 10:06:25 -04:00
commit c5ea91da44
164 changed files with 272 additions and 327 deletions
Download patch file Download diff file Expand all files Collapse all files

2
include/hw/acpi/aml-build.h
View file

@ -277,7 +277,7 @@ void free_aml_allocator(void);
* @child: element that is copied into @parent_ctx context
*
* Joins Aml elements together and helps to construct AML tables
* Examle of usage:
* Example of usage:
* Aml *table = aml_def_block("SSDT", ...);
* Aml *sb = aml_scope("\\_SB");
* Aml *dev = aml_device("PCI0");

2
include/hw/acpi/pc-hotplug.h
View file

@ -13,7 +13,7 @@
#define PC_HOTPLUG_H
/*
* ONLY DEFINEs are permited in this file since it's shared
* ONLY DEFINEs are permitted in this file since it's shared
* between C and ASL code.
*/

2
include/hw/acpi/vmgenid.h
View file

@ -13,7 +13,7 @@
#define VMGENID_FW_CFG_SIZE 4096 /* Occupy a page of memory */
#define VMGENID_GUID_OFFSET 40 /* allow space for
* OVMF SDT Header Probe Supressor
* OVMF SDT Header Probe Suppressor
*/
OBJECT_DECLARE_SIMPLE_TYPE(VmGenIdState, VMGENID)

6
include/hw/boards.h
View file

@ -158,7 +158,7 @@ typedef struct {
* any actions to be performed by hotplug handler.
* @cpu_index_to_instance_props:
* used to provide @cpu_index to socket/core/thread number mapping, allowing
* legacy code to perform maping from cpu_index to topology properties
* legacy code to perform mapping from cpu_index to topology properties
* Returns: tuple of socket/core/thread ids given cpu_index belongs to.
* used to provide @cpu_index to socket number mapping, allowing
* a machine to group CPU threads belonging to the same socket/package
@ -211,10 +211,10 @@ typedef struct {
* the rejection. If the hook is not provided, all hotplug will be
* allowed.
* @default_ram_id:
* Specifies inital RAM MemoryRegion name to be used for default backend
* Specifies initial RAM MemoryRegion name to be used for default backend
* creation if user explicitly hasn't specified backend with "memory-backend"
* property.
* It also will be used as a way to optin into "-m" option support.
* It also will be used as a way to option into "-m" option support.
* If it's not set by board, '-m' will be ignored and generic code will
* not create default RAM MemoryRegion.
* @fixup_ram_size:

2
include/hw/char/avr_usart.h
View file

@ -34,7 +34,7 @@
#define USART_BRRH 0x05
#define USART_BRRL 0x04
/* Relevant bits in regiters. */
/* Relevant bits in registers. */
#define USART_CSRA_RXC (1 << 7)
#define USART_CSRA_TXC (1 << 6)
#define USART_CSRA_DRE (1 << 5)

2
include/hw/clock.h
View file

@ -204,7 +204,7 @@ static inline bool clock_set_ns(Clock *clk, unsigned ns)
* Propagate the clock period that has been previously configured using
* @clock_set(). This will update recursively all connected clocks.
* It is an error to call this function on a clock which has a source.
* Note: this function must not be called during device inititialization
* Note: this function must not be called during device initialization
* or migration.
*/
void clock_propagate(Clock *clk);

2
include/hw/cxl/cxl_device.h
View file

@ -208,7 +208,7 @@ void cxl_event_set_status(CXLDeviceState *cxl_dstate, CXLEventLogType log_type,
* > is the maximum access size allowed for these registers. If this rule is not
* > followed, the behavior is undefined
*
* CXL 2.0 Errata F4 states futher that the layouts in the specification are
* CXL 2.0 Errata F4 states further that the layouts in the specification are
* shown as greater than 128 bits, but implementations are expected to
* use any size of access up to 64 bits.
*

2
include/hw/hyperv/vmbus.h
View file

@ -51,7 +51,7 @@ struct VMBusDeviceClass {
uint16_t channel_flags;
uint16_t mmio_size_mb;
/* Extentions to standard device callbacks */
/* Extensions to standard device callbacks */
void (*vmdev_realize)(VMBusDevice *vdev, Error **errp);
void (*vmdev_unrealize)(VMBusDevice *vdev);
void (*vmdev_reset)(VMBusDevice *vdev);

2
include/hw/misc/macio/pmu.h
View file

@ -76,7 +76,7 @@
#define PMU_INT_WAITING_CHARGER 0x01 /* ??? */
#define PMU_INT_AUTO_SRQ_POLL 0x02 /* ??? */
/* Bits in the environement message (either obtained via PMU_GET_COVER,
/* Bits in the environment message (either obtained via PMU_GET_COVER,
* or via PMU_INT_ENVIRONMENT on core99 */
#define PMU_ENV_LID_CLOSED 0x01 /* The lid is closed */

2
include/hw/net/mii.h
View file

@ -71,7 +71,7 @@
#define MII_BMSR_JABBER (1 << 1) /* Jabber detected */
#define MII_BMSR_EXTCAP (1 << 0) /* Ext-reg capability */
#define MII_ANAR_PAUSE_ASYM (1 << 11) /* Try for asymetric pause */
#define MII_ANAR_PAUSE_ASYM (1 << 11) /* Try for asymmetric pause */
#define MII_ANAR_PAUSE (1 << 10) /* Try for pause */
#define MII_ANAR_TXFD (1 << 8)
#define MII_ANAR_TX (1 << 7)

2
include/hw/pci-host/dino.h
View file

@ -1,5 +1,5 @@
/*
* HP-PARISC Dino PCI chipset emulation, as in B160L and similiar machines
* HP-PARISC Dino PCI chipset emulation, as in B160L and similar machines
*
* (C) 2017-2019 by Helge Deller <deller@gmx.de>
*

2
include/hw/pci/pcie_aer.h
View file

@ -40,7 +40,7 @@ struct PCIEAERLog {
* The specified value will be clipped down to PCIE_AER_LOG_MAX_LIMIT
* to avoid unreasonable memory usage.
* I bet that 128 log size would be big enough, otherwise too many errors
* for system to function normaly. But could consecutive errors occur?
* for system to function normally. But could consecutive errors occur?
*/
#define PCIE_AER_LOG_MAX_DEFAULT 8
#define PCIE_AER_LOG_MAX_LIMIT 128

2
include/hw/riscv/riscv_hart.h
View file

@ -3,7 +3,7 @@
*
* Copyright (c) 2017 SiFive, Inc.
*
* Holds the state of a heterogenous array of RISC-V harts
* Holds the state of a heterogeneous array of RISC-V harts
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License,

2
include/hw/ssi/xilinx_spips.h
View file

@ -104,7 +104,7 @@ struct XlnxZynqMPQSPIPS {
uint32_t regs[XLNX_ZYNQMP_SPIPS_R_MAX];
/* GQSPI has seperate tx/rx fifos */
/* GQSPI has separate tx/rx fifos */
Fifo8 rx_fifo_g;
Fifo8 tx_fifo_g;
Fifo32 fifo_g;

2
include/hw/virtio/virtio-net.h
View file

@ -109,7 +109,7 @@ typedef struct VirtioNetRscSeg {
size_t size;
uint16_t packets;
uint16_t dup_ack;
bool is_coalesced; /* need recal ipv4 header checksum, mark here */
bool is_coalesced; /* need recall ipv4 header checksum, mark here */
VirtioNetRscUnit unit;
NetClientState *nc;
} VirtioNetRscSeg;