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PowerPC 4xx software driven TLB fixes + debug traces.

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Add code provision for more MMU models support.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2683 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-04-16 09:21:46 +00:00
parent 0a032cbec6
commit c55e9aefa7
3 changed files with 163 additions and 39 deletions
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12
target-ppc/cpu.h
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@ -581,12 +581,12 @@ struct ppc6xx_tlb_t {
typedef struct ppcemb_tlb_t ppcemb_tlb_t;
struct ppcemb_tlb_t {
target_ulong RPN;
target_phys_addr_t RPN;
target_ulong EPN;
target_ulong PID;
int size;
int prot;
int attr; /* Storage attributes */
target_ulong size;
uint32_t prot;
uint32_t attr; /* Storage attributes */
};
union ppc_tlb_t {
@ -765,10 +765,6 @@ struct CPUPPCState {
int id_tlbs; /* If 1, MMU has separated TLBs for instructions & data */
int nb_pids; /* Number of available PID registers */
ppc_tlb_t *tlb; /* TLB is optional. Allocate them only if needed */
/* Callbacks for specific checks on some implementations */
int (*tlb_check_more)(CPUPPCState *env, ppc_tlb_t *tlb, int *prot,
target_ulong vaddr, int rw, int acc_type,
int is_user);
/* 403 dedicated access protection registers */
target_ulong pb[4];