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target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/
These files got missed when populating tcg/. Because they are included with "", no change to the users required. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230504110412.1892411-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson
Peter Maydell
parent
278238505d
commit
c460132251
3 changed files with 0 additions and 0 deletions
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target/arm/tcg/sve_ldst_internal.h
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222
target/arm/tcg/sve_ldst_internal.h
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/*
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* ARM SVE Load/Store Helpers
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*
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* Copyright (c) 2018-2022 Linaro
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TARGET_ARM_SVE_LDST_INTERNAL_H
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#define TARGET_ARM_SVE_LDST_INTERNAL_H
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#include "exec/cpu_ldst.h"
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/*
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* Load one element into @vd + @reg_off from @host.
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* The controlling predicate is known to be true.
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*/
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typedef void sve_ldst1_host_fn(void *vd, intptr_t reg_off, void *host);
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/*
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* Load one element into @vd + @reg_off from (@env, @vaddr, @ra).
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* The controlling predicate is known to be true.
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*/
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typedef void sve_ldst1_tlb_fn(CPUARMState *env, void *vd, intptr_t reg_off,
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target_ulong vaddr, uintptr_t retaddr);
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/*
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* Generate the above primitives.
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*/
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#define DO_LD_HOST(NAME, H, TYPEE, TYPEM, HOST) \
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static inline void sve_##NAME##_host(void *vd, intptr_t reg_off, void *host) \
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{ TYPEM val = HOST(host); *(TYPEE *)(vd + H(reg_off)) = val; }
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#define DO_ST_HOST(NAME, H, TYPEE, TYPEM, HOST) \
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static inline void sve_##NAME##_host(void *vd, intptr_t reg_off, void *host) \
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{ TYPEM val = *(TYPEE *)(vd + H(reg_off)); HOST(host, val); }
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#define DO_LD_TLB(NAME, H, TYPEE, TYPEM, TLB) \
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static inline void sve_##NAME##_tlb(CPUARMState *env, void *vd, \
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intptr_t reg_off, target_ulong addr, uintptr_t ra) \
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{ \
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TYPEM val = TLB(env, useronly_clean_ptr(addr), ra); \
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*(TYPEE *)(vd + H(reg_off)) = val; \
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}
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#define DO_ST_TLB(NAME, H, TYPEE, TYPEM, TLB) \
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static inline void sve_##NAME##_tlb(CPUARMState *env, void *vd, \
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intptr_t reg_off, target_ulong addr, uintptr_t ra) \
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{ \
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TYPEM val = *(TYPEE *)(vd + H(reg_off)); \
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TLB(env, useronly_clean_ptr(addr), val, ra); \
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}
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#define DO_LD_PRIM_1(NAME, H, TE, TM) \
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DO_LD_HOST(NAME, H, TE, TM, ldub_p) \
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DO_LD_TLB(NAME, H, TE, TM, cpu_ldub_data_ra)
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DO_LD_PRIM_1(ld1bb, H1, uint8_t, uint8_t)
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DO_LD_PRIM_1(ld1bhu, H1_2, uint16_t, uint8_t)
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DO_LD_PRIM_1(ld1bhs, H1_2, uint16_t, int8_t)
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DO_LD_PRIM_1(ld1bsu, H1_4, uint32_t, uint8_t)
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DO_LD_PRIM_1(ld1bss, H1_4, uint32_t, int8_t)
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DO_LD_PRIM_1(ld1bdu, H1_8, uint64_t, uint8_t)
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DO_LD_PRIM_1(ld1bds, H1_8, uint64_t, int8_t)
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#define DO_ST_PRIM_1(NAME, H, TE, TM) \
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DO_ST_HOST(st1##NAME, H, TE, TM, stb_p) \
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DO_ST_TLB(st1##NAME, H, TE, TM, cpu_stb_data_ra)
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DO_ST_PRIM_1(bb, H1, uint8_t, uint8_t)
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DO_ST_PRIM_1(bh, H1_2, uint16_t, uint8_t)
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DO_ST_PRIM_1(bs, H1_4, uint32_t, uint8_t)
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DO_ST_PRIM_1(bd, H1_8, uint64_t, uint8_t)
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#define DO_LD_PRIM_2(NAME, H, TE, TM, LD) \
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DO_LD_HOST(ld1##NAME##_be, H, TE, TM, LD##_be_p) \
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DO_LD_HOST(ld1##NAME##_le, H, TE, TM, LD##_le_p) \
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DO_LD_TLB(ld1##NAME##_be, H, TE, TM, cpu_##LD##_be_data_ra) \
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DO_LD_TLB(ld1##NAME##_le, H, TE, TM, cpu_##LD##_le_data_ra)
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#define DO_ST_PRIM_2(NAME, H, TE, TM, ST) \
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DO_ST_HOST(st1##NAME##_be, H, TE, TM, ST##_be_p) \
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DO_ST_HOST(st1##NAME##_le, H, TE, TM, ST##_le_p) \
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DO_ST_TLB(st1##NAME##_be, H, TE, TM, cpu_##ST##_be_data_ra) \
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DO_ST_TLB(st1##NAME##_le, H, TE, TM, cpu_##ST##_le_data_ra)
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DO_LD_PRIM_2(hh, H1_2, uint16_t, uint16_t, lduw)
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DO_LD_PRIM_2(hsu, H1_4, uint32_t, uint16_t, lduw)
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DO_LD_PRIM_2(hss, H1_4, uint32_t, int16_t, lduw)
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DO_LD_PRIM_2(hdu, H1_8, uint64_t, uint16_t, lduw)
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DO_LD_PRIM_2(hds, H1_8, uint64_t, int16_t, lduw)
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DO_ST_PRIM_2(hh, H1_2, uint16_t, uint16_t, stw)
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DO_ST_PRIM_2(hs, H1_4, uint32_t, uint16_t, stw)
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DO_ST_PRIM_2(hd, H1_8, uint64_t, uint16_t, stw)
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DO_LD_PRIM_2(ss, H1_4, uint32_t, uint32_t, ldl)
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DO_LD_PRIM_2(sdu, H1_8, uint64_t, uint32_t, ldl)
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DO_LD_PRIM_2(sds, H1_8, uint64_t, int32_t, ldl)
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DO_ST_PRIM_2(ss, H1_4, uint32_t, uint32_t, stl)
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DO_ST_PRIM_2(sd, H1_8, uint64_t, uint32_t, stl)
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DO_LD_PRIM_2(dd, H1_8, uint64_t, uint64_t, ldq)
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DO_ST_PRIM_2(dd, H1_8, uint64_t, uint64_t, stq)
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#undef DO_LD_TLB
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#undef DO_ST_TLB
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#undef DO_LD_HOST
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#undef DO_LD_PRIM_1
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#undef DO_ST_PRIM_1
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#undef DO_LD_PRIM_2
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#undef DO_ST_PRIM_2
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/*
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* Resolve the guest virtual address to info->host and info->flags.
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* If @nofault, return false if the page is invalid, otherwise
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* exit via page fault exception.
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*/
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typedef struct {
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void *host;
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int flags;
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MemTxAttrs attrs;
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bool tagged;
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} SVEHostPage;
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bool sve_probe_page(SVEHostPage *info, bool nofault, CPUARMState *env,
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target_ulong addr, int mem_off, MMUAccessType access_type,
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int mmu_idx, uintptr_t retaddr);
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/*
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* Analyse contiguous data, protected by a governing predicate.
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*/
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typedef enum {
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FAULT_NO,
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FAULT_FIRST,
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FAULT_ALL,
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} SVEContFault;
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typedef struct {
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/*
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* First and last element wholly contained within the two pages.
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* mem_off_first[0] and reg_off_first[0] are always set >= 0.
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* reg_off_last[0] may be < 0 if the first element crosses pages.
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* All of mem_off_first[1], reg_off_first[1] and reg_off_last[1]
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* are set >= 0 only if there are complete elements on a second page.
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*
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* The reg_off_* offsets are relative to the internal vector register.
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* The mem_off_first offset is relative to the memory address; the
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* two offsets are different when a load operation extends, a store
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* operation truncates, or for multi-register operations.
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*/
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int16_t mem_off_first[2];
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int16_t reg_off_first[2];
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int16_t reg_off_last[2];
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/*
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* One element that is misaligned and spans both pages,
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* or -1 if there is no such active element.
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*/
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int16_t mem_off_split;
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int16_t reg_off_split;
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/*
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* The byte offset at which the entire operation crosses a page boundary.
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* Set >= 0 if and only if the entire operation spans two pages.
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*/
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int16_t page_split;
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/* TLB data for the two pages. */
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SVEHostPage page[2];
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} SVEContLdSt;
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/*
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* Find first active element on each page, and a loose bound for the
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* final element on each page. Identify any single element that spans
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* the page boundary. Return true if there are any active elements.
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*/
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bool sve_cont_ldst_elements(SVEContLdSt *info, target_ulong addr, uint64_t *vg,
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intptr_t reg_max, int esz, int msize);
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/*
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* Resolve the guest virtual addresses to info->page[].
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* Control the generation of page faults with @fault. Return false if
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* there is no work to do, which can only happen with @fault == FAULT_NO.
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*/
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bool sve_cont_ldst_pages(SVEContLdSt *info, SVEContFault fault,
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CPUARMState *env, target_ulong addr,
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MMUAccessType access_type, uintptr_t retaddr);
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#ifdef CONFIG_USER_ONLY
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static inline void
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sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env, uint64_t *vg,
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target_ulong addr, int esize, int msize,
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int wp_access, uintptr_t retaddr)
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{ }
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#else
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void sve_cont_ldst_watchpoints(SVEContLdSt *info, CPUARMState *env,
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uint64_t *vg, target_ulong addr,
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int esize, int msize, int wp_access,
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uintptr_t retaddr);
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#endif
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void sve_cont_ldst_mte_check(SVEContLdSt *info, CPUARMState *env, uint64_t *vg,
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target_ulong addr, int esize, int msize,
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uint32_t mtedesc, uintptr_t ra);
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#endif /* TARGET_ARM_SVE_LDST_INTERNAL_H */
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