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hw/intc/loongarch_extioi: Add irq routing support from physical id
The simliar with IPI interrupt controller, physical cpu id is used for irq routing for extioi interrupt controller. Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
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parent
0443b85887
commit
c3afa714bc
1 changed files with 26 additions and 4 deletions
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@ -15,6 +15,23 @@
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#include "hw/intc/loongarch_extioi.h"
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#include "hw/intc/loongarch_extioi.h"
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#include "trace.h"
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#include "trace.h"
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static int extioi_get_index_from_archid(LoongArchExtIOICommonState *s,
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uint64_t arch_id)
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{
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int i;
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for (i = 0; i < s->num_cpu; i++) {
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if (s->cpu[i].arch_id == arch_id) {
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break;
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}
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}
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if ((i < s->num_cpu) && s->cpu[i].cpu) {
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return i;
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}
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return -1;
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}
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static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int level)
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static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int level)
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{
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{
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@ -125,7 +142,7 @@ static inline void extioi_enable_irq(LoongArchExtIOICommonState *s, int index,\
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static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s,
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static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s,
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int irq, uint64_t val, bool notify)
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int irq, uint64_t val, bool notify)
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{
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{
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int i, cpu;
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int i, cpu, cpuid;
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/*
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/*
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* loongarch only support little endian,
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* loongarch only support little endian,
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@ -134,12 +151,17 @@ static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s,
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val = cpu_to_le64(val);
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val = cpu_to_le64(val);
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for (i = 0; i < 4; i++) {
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for (i = 0; i < 4; i++) {
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cpu = val & 0xff;
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cpuid = val & 0xff;
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val = val >> 8;
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val = val >> 8;
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if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) {
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if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) {
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cpu = ctz32(cpu);
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cpuid = ctz32(cpuid);
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cpu = (cpu >= 4) ? 0 : cpu;
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cpuid = (cpuid >= 4) ? 0 : cpuid;
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}
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cpu = extioi_get_index_from_archid(s, cpuid);
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if (cpu < 0) {
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continue;
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}
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}
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if (s->sw_coremap[irq + i] == cpu) {
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if (s->sw_coremap[irq + i] == cpu) {
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