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hw/intc/loongarch_extioi: Add irq routing support from physical id

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The simliar with IPI interrupt controller, physical cpu id is used
for irq routing for extioi interrupt controller.

Signed-off-by: Bibo Mao <maobibo@loongson.cn>
Reviewed-by: Bibo Mao <maobibo@loongson.cn>
This commit is contained in:
Bibo Mao 2025-01-06 15:36:27 +08:00
parent 0443b85887
commit c3afa714bc
1 changed files with 26 additions and 4 deletions
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30
hw/intc/loongarch_extioi.c
View file

@ -15,6 +15,23 @@
#include "hw/intc/loongarch_extioi.h"
#include "trace.h"
static int extioi_get_index_from_archid(LoongArchExtIOICommonState *s,
uint64_t arch_id)
{
int i;
for (i = 0; i < s->num_cpu; i++) {
if (s->cpu[i].arch_id == arch_id) {
break;
}
}
if ((i < s->num_cpu) && s->cpu[i].cpu) {
return i;
}
return -1;
}
static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int level)
{
@ -125,7 +142,7 @@ static inline void extioi_enable_irq(LoongArchExtIOICommonState *s, int index,\
static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s,
int irq, uint64_t val, bool notify)
{
int i, cpu;
int i, cpu, cpuid;
/*
* loongarch only support little endian,
@ -134,12 +151,17 @@ static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s,
val = cpu_to_le64(val);
for (i = 0; i < 4; i++) {
cpu = val & 0xff;
cpuid = val & 0xff;
val = val >> 8;
if (!(s->status & BIT(EXTIOI_ENABLE_CPU_ENCODE))) {
cpu = ctz32(cpu);
cpu = (cpu >= 4) ? 0 : cpu;
cpuid = ctz32(cpuid);
cpuid = (cpuid >= 4) ? 0 : cpuid;
}
cpu = extioi_get_index_from_archid(s, cpuid);
if (cpu < 0) {
continue;
}
if (s->sw_coremap[irq + i] == cpu) {