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ppc/pnv: add a PSI bridge model for POWER9

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The PSI bridge on POWER9 is very similar to POWER8. The BAR is still
set through XSCOM but the controls are now entirely done with MMIOs.
More interrupts are defined and the interrupt controller interface has
changed to XIVE. The POWER9 model is a first example of the usage of
the notify() handler of the XiveNotifier interface, linking the PSI
XiveSource to its owning device model.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20190307223548.20516-3-clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Cédric Le Goater 2019-03-07 23:35:35 +01:00 • committed by David Gibson
parent ae85605531
commit c38536bc80
5 changed files with 384 additions and 2 deletions
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30
include/hw/ppc/pnv_psi.h
View file

@ -21,6 +21,7 @@
#include "hw/sysbus.h"
#include "hw/ppc/xics.h"
#include "hw/ppc/xive.h"
#define TYPE_PNV_PSI "pnv-psi"
#define PNV_PSI(obj) \
@ -57,6 +58,16 @@ typedef struct Pnv8Psi {
ICSState ics;
} Pnv8Psi;
#define TYPE_PNV9_PSI TYPE_PNV_PSI "-POWER9"
#define PNV9_PSI(obj) \
OBJECT_CHECK(Pnv9Psi, (obj), TYPE_PNV9_PSI)
typedef struct Pnv9Psi {
PnvPsi parent;
XiveSource source;
} Pnv9Psi;
#define PNV_PSI_CLASS(klass) \
OBJECT_CLASS_CHECK(PnvPsiClass, (klass), TYPE_PNV_PSI)
#define PNV_PSI_GET_CLASS(obj) \
@ -88,4 +99,23 @@ typedef enum PnvPsiIrq {
void pnv_psi_irq_set(PnvPsi *psi, int irq, bool state);
/* P9 PSI Interrupts */
#define PSIHB9_IRQ_PSI 0
#define PSIHB9_IRQ_OCC 1
#define PSIHB9_IRQ_FSI 2
#define PSIHB9_IRQ_LPCHC 3
#define PSIHB9_IRQ_LOCAL_ERR 4
#define PSIHB9_IRQ_GLOBAL_ERR 5
#define PSIHB9_IRQ_TPM 6
#define PSIHB9_IRQ_LPC_SIRQ0 7
#define PSIHB9_IRQ_LPC_SIRQ1 8
#define PSIHB9_IRQ_LPC_SIRQ2 9
#define PSIHB9_IRQ_LPC_SIRQ3 10
#define PSIHB9_IRQ_SBE_I2C 11
#define PSIHB9_IRQ_DIO 12
#define PSIHB9_IRQ_PSU 13
#define PSIHB9_NUM_IRQS 14
void pnv_psi_pic_print_info(Pnv9Psi *psi, Monitor *mon);
#endif /* _PPC_PNV_PSI_H */