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target/arm: Add SVCR

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This cpreg is used to access two new bits of PSTATE
that are not visible via any other mechanism.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220620175235.60881-6-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Richard Henderson 2022-06-20 10:51:49 -07:00 • committed by Peter Maydell
parent bca063d579
commit c37e6ac9eb
2 changed files with 19 additions and 0 deletions
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13
target/arm/helper.c
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@ -6349,11 +6349,24 @@ static CPAccessResult access_tpidr2(CPUARMState *env, const ARMCPRegInfo *ri,
return CP_ACCESS_OK;
}
static void svcr_write(CPUARMState *env, const ARMCPRegInfo *ri,
uint64_t value)
{
value &= R_SVCR_SM_MASK | R_SVCR_ZA_MASK;
/* TODO: Side effects. */
env->svcr = value;
}
static const ARMCPRegInfo sme_reginfo[] = {
{ .name = "TPIDR2_EL0", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 3, .crn = 13, .crm = 0, .opc2 = 5,
.access = PL0_RW, .accessfn = access_tpidr2,
.fieldoffset = offsetof(CPUARMState, cp15.tpidr2_el0) },
{ .name = "SVCR", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 3, .crn = 4, .crm = 2, .opc2 = 2,
.access = PL0_RW, .type = ARM_CP_SME,
.fieldoffset = offsetof(CPUARMState, svcr),
.writefn = svcr_write, .raw_writefn = raw_write },
};
#endif /* TARGET_AARCH64 */