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target/ppc: PMU implement PERFM interrupts
The PMU raises a performance monitor exception (causing an interrupt when MSR[EE]=1) when MMCR0[PMAO] is set, and lowers it when clear. Wire this up and implement the interrupt delivery for books. Linux perf record can now collect PMI-driven samples. fire_PMC_interrupt is renamed to perfm_alert, which matches a bit closer to the new terminology used in the ISA and distinguishes the alert condition (e.g., counter overflow) from the PERFM (or EBB) interrupts. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20230530134313.387252-2-npiggin@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
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2 changed files with 15 additions and 8 deletions
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@ -1543,6 +1543,7 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
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case POWERPC_EXCP_ISEG: /* Instruction segment exception */
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case POWERPC_EXCP_TRACE: /* Trace exception */
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case POWERPC_EXCP_SDOOR: /* Doorbell interrupt */
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case POWERPC_EXCP_PERFM: /* Performance monitor interrupt */
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break;
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case POWERPC_EXCP_HISI: /* Hypervisor instruction storage exception */
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msr |= env->error_code;
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@ -1585,7 +1586,6 @@ static void powerpc_excp_books(PowerPCCPU *cpu, int excp)
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*/
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return;
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case POWERPC_EXCP_THERM: /* Thermal interrupt */
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case POWERPC_EXCP_PERFM: /* Embedded performance monitor interrupt */
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case POWERPC_EXCP_VPUA: /* Vector assist exception */
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case POWERPC_EXCP_MAINT: /* Maintenance exception */
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case POWERPC_EXCP_HV_MAINT: /* Hypervisor Maintenance exception */
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