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64 bit target support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1189 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
612458f544
commit
c27004ec78
12 changed files with 309 additions and 204 deletions
39
exec-all.h
39
exec-all.h
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@ -55,8 +55,10 @@ struct TranslationBlock;
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extern uint16_t gen_opc_buf[OPC_BUF_SIZE];
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extern uint32_t gen_opparam_buf[OPPARAM_BUF_SIZE];
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extern uint32_t gen_opc_pc[OPC_BUF_SIZE];
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extern uint32_t gen_opc_npc[OPC_BUF_SIZE];
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extern long gen_labels[OPC_BUF_SIZE];
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extern int nb_gen_labels;
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extern target_ulong gen_opc_pc[OPC_BUF_SIZE];
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extern target_ulong gen_opc_npc[OPC_BUF_SIZE];
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extern uint8_t gen_opc_cc_op[OPC_BUF_SIZE];
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extern uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
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@ -186,7 +188,7 @@ typedef struct TranslationBlock {
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struct TranslationBlock *jmp_first;
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} TranslationBlock;
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static inline unsigned int tb_hash_func(unsigned long pc)
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static inline unsigned int tb_hash_func(target_ulong pc)
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{
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return pc & (CODE_GEN_HASH_SIZE - 1);
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}
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@ -196,7 +198,7 @@ static inline unsigned int tb_phys_hash_func(unsigned long pc)
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return pc & (CODE_GEN_PHYS_HASH_SIZE - 1);
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}
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TranslationBlock *tb_alloc(unsigned long pc);
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TranslationBlock *tb_alloc(target_ulong pc);
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void tb_flush(CPUState *env);
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void tb_link(TranslationBlock *tb);
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void tb_link_phys(TranslationBlock *tb,
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@ -329,7 +331,7 @@ do {\
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"b " ASM_NAME(__op_jmp) #n "\n"\
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"1:\n");\
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T0 = (long)(tbparam) + (n);\
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EIP = eip;\
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EIP = (int32_t)eip;\
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EXIT_TB();\
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} while (0)
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@ -341,6 +343,16 @@ do {\
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#elif defined(__i386__) && defined(USE_DIRECT_JUMP)
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/* we patch the jump instruction directly */
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#define GOTO_TB(opname, n)\
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do {\
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asm volatile (".section .data\n"\
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ASM_NAME(__op_label) #n "." ASM_NAME(opname) ":\n"\
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".long 1f\n"\
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ASM_PREVIOUS_SECTION \
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"jmp " ASM_NAME(__op_jmp) #n "\n"\
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"1:\n");\
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} while (0)
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#define JUMP_TB(opname, tbparam, n, eip)\
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do {\
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asm volatile (".section .data\n"\
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@ -350,7 +362,7 @@ do {\
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"jmp " ASM_NAME(__op_jmp) #n "\n"\
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"1:\n");\
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T0 = (long)(tbparam) + (n);\
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EIP = eip;\
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EIP = (int32_t)eip;\
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EXIT_TB();\
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} while (0)
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@ -370,7 +382,7 @@ do {\
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goto *(void *)(((TranslationBlock *)tbparam)->tb_next[n]);\
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label ## n:\
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T0 = (long)(tbparam) + (n);\
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EIP = eip;\
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EIP = (int32_t)eip;\
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dummy_label ## n:\
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EXIT_TB();\
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} while (0)
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@ -544,7 +556,7 @@ extern int tb_invalidated_flag;
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#if !defined(CONFIG_USER_ONLY)
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void tlb_fill(unsigned long addr, int is_write, int is_user,
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void tlb_fill(target_ulong addr, int is_write, int is_user,
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void *retaddr);
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#define ACCESS_TYPE 3
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@ -560,6 +572,9 @@ void tlb_fill(unsigned long addr, int is_write, int is_user,
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#define DATA_SIZE 4
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#include "softmmu_header.h"
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#define DATA_SIZE 8
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#include "softmmu_header.h"
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#undef ACCESS_TYPE
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#undef MEMSUFFIX
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#undef env
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@ -578,7 +593,7 @@ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
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/* XXX: i386 target specific */
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static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
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{
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int is_user, index;
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int is_user, index, pd;
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index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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#if defined(TARGET_I386)
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@ -592,7 +607,11 @@ static inline target_ulong get_phys_addr_code(CPUState *env, target_ulong addr)
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#endif
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if (__builtin_expect(env->tlb_read[is_user][index].address !=
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(addr & TARGET_PAGE_MASK), 0)) {
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ldub_code((void *)addr);
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ldub_code(addr);
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}
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pd = env->tlb_read[is_user][index].address & ~TARGET_PAGE_MASK;
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if (pd > IO_MEM_ROM) {
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cpu_abort(env, "Trying to execute code outside RAM or ROM at 0x%08lx\n", addr);
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}
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return addr + env->tlb_read[is_user][index].addend - (unsigned long)phys_ram_base;
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}
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