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Revert "Get rid of _t suffix"

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In the very least, a change like this requires discussion on the list.

The naming convention is goofy and it causes a massive merge problem.  Something
like this _must_ be presented on the list first so people can provide input
and cope with it.

This reverts commit 99a0949b72.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Anthony Liguori 2009-10-01 16:12:16 -05:00
parent 99a0949b72
commit c227f0995e
316 changed files with 3332 additions and 3325 deletions
Download patch file Download diff file Expand all files Collapse all files

22
hw/pxa2xx_dma.c
View file

@ -12,9 +12,9 @@
#include "pxa.h"
typedef struct {
a_target_phys_addr descr;
a_target_phys_addr src;
a_target_phys_addr dest;
target_phys_addr_t descr;
target_phys_addr_t src;
target_phys_addr_t dest;
uint32_t cmd;
uint32_t state;
int request;
@ -148,7 +148,7 @@ static inline void pxa2xx_dma_descriptor_fetch(
PXA2xxDMAState *s, int ch)
{
uint32_t desc[4];
a_target_phys_addr daddr = s->chan[ch].descr & ~0xf;
target_phys_addr_t daddr = s->chan[ch].descr & ~0xf;
if ((s->chan[ch].descr & DDADR_BREN) && (s->chan[ch].state & DCSR_CMPST))
daddr += 32;
@ -252,7 +252,7 @@ static void pxa2xx_dma_run(PXA2xxDMAState *s)
}
}
static uint32_t pxa2xx_dma_read(void *opaque, a_target_phys_addr offset)
static uint32_t pxa2xx_dma_read(void *opaque, target_phys_addr_t offset)
{
PXA2xxDMAState *s = (PXA2xxDMAState *) opaque;
unsigned int channel;
@ -306,7 +306,7 @@ static uint32_t pxa2xx_dma_read(void *opaque, a_target_phys_addr offset)
}
static void pxa2xx_dma_write(void *opaque,
a_target_phys_addr offset, uint32_t value)
target_phys_addr_t offset, uint32_t value)
{
PXA2xxDMAState *s = (PXA2xxDMAState *) opaque;
unsigned int channel;
@ -404,14 +404,14 @@ static void pxa2xx_dma_write(void *opaque,
}
}
static uint32_t pxa2xx_dma_readbad(void *opaque, a_target_phys_addr offset)
static uint32_t pxa2xx_dma_readbad(void *opaque, target_phys_addr_t offset)
{
hw_error("%s: Bad access width\n", __FUNCTION__);
return 5;
}
static void pxa2xx_dma_writebad(void *opaque,
a_target_phys_addr offset, uint32_t value)
target_phys_addr_t offset, uint32_t value)
{
hw_error("%s: Bad access width\n", __FUNCTION__);
}
@ -483,7 +483,7 @@ static int pxa2xx_dma_load(QEMUFile *f, void *opaque, int version_id)
return 0;
}
static PXA2xxDMAState *pxa2xx_dma_init(a_target_phys_addr base,
static PXA2xxDMAState *pxa2xx_dma_init(target_phys_addr_t base,
qemu_irq irq, int channels)
{
int i, iomemtype;
@ -512,13 +512,13 @@ static PXA2xxDMAState *pxa2xx_dma_init(a_target_phys_addr base,
return s;
}
PXA2xxDMAState *pxa27x_dma_init(a_target_phys_addr base,
PXA2xxDMAState *pxa27x_dma_init(target_phys_addr_t base,
qemu_irq irq)
{
return pxa2xx_dma_init(base, irq, PXA27X_DMA_NUM_CHANNELS);
}
PXA2xxDMAState *pxa255_dma_init(a_target_phys_addr base,
PXA2xxDMAState *pxa255_dma_init(target_phys_addr_t base,
qemu_irq irq)
{
return pxa2xx_dma_init(base, irq, PXA255_DMA_NUM_CHANNELS);