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ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models

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The power7_set_irq() and power9_set_irq() functions set this but it is
never used actually. Modern Book3s compatible CPUs are only supported
by the pnv and spapr machines. They have an interrupt controller, XICS
for POWER7/8 and XIVE for POWER9, whose models don't require to track
IRQ input states at the CPU level.

Drop these lines to avoid confusion.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157548862861.3650476.16622818876928044450.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Greg Kurz 2019-12-04 20:43:48 +01:00 • committed by David Gibson
parent 4febcdd88f
commit c1ad0b892c
2 changed files with 5 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

16
hw/ppc/ppc.c
View file

@ -275,10 +275,9 @@ void ppc970_irq_init(PowerPCCPU *cpu)
static void power7_set_irq(void *opaque, int pin, int level) static void power7_set_irq(void *opaque, int pin, int level)
{ {
PowerPCCPU *cpu = opaque; PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__, LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
env, pin, level); &cpu->env, pin, level);
switch (pin) { switch (pin) {
case POWER7_INPUT_INT: case POWER7_INPUT_INT:
@ -292,11 +291,6 @@ static void power7_set_irq(void *opaque, int pin, int level)
LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin); LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
return; return;
} }
if (level) {
env->irq_input_state |= 1 << pin;
} else {
env->irq_input_state &= ~(1 << pin);
}
} }
void ppcPOWER7_irq_init(PowerPCCPU *cpu) void ppcPOWER7_irq_init(PowerPCCPU *cpu)
@ -311,10 +305,9 @@ void ppcPOWER7_irq_init(PowerPCCPU *cpu)
static void power9_set_irq(void *opaque, int pin, int level) static void power9_set_irq(void *opaque, int pin, int level)
{ {
PowerPCCPU *cpu = opaque; PowerPCCPU *cpu = opaque;
CPUPPCState *env = &cpu->env;
LOG_IRQ("%s: env %p pin %d level %d\n", __func__, LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
env, pin, level); &cpu->env, pin, level);
switch (pin) { switch (pin) {
case POWER9_INPUT_INT: case POWER9_INPUT_INT:
@ -334,11 +327,6 @@ static void power9_set_irq(void *opaque, int pin, int level)
LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin); LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
return; return;
} }
if (level) {
env->irq_input_state |= 1 << pin;
} else {
env->irq_input_state &= ~(1 << pin);
}
} }
void ppcPOWER9_irq_init(PowerPCCPU *cpu) void ppcPOWER9_irq_init(PowerPCCPU *cpu)

4
target/ppc/cpu.h
View file

@ -1090,7 +1090,9 @@ struct CPUPPCState {
#if !defined(CONFIG_USER_ONLY) #if !defined(CONFIG_USER_ONLY)
/* /*
* This is the IRQ controller, which is implementation dependent * This is the IRQ controller, which is implementation dependent
* and only relevant when emulating a complete machine. * and only relevant when emulating a complete machine. Note that
* this isn't used by recent Book3s compatible CPUs (POWER7 and
* newer).
*/ */
uint32_t irq_input_state; uint32_t irq_input_state;
void **irq_inputs; void **irq_inputs;