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ppc: Don't use CPUPPCState::irq_input_state with modern Book3s CPU models

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The power7_set_irq() and power9_set_irq() functions set this but it is
never used actually. Modern Book3s compatible CPUs are only supported
by the pnv and spapr machines. They have an interrupt controller, XICS
for POWER7/8 and XIVE for POWER9, whose models don't require to track
IRQ input states at the CPU level.

Drop these lines to avoid confusion.

Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157548862861.3650476.16622818876928044450.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
This commit is contained in:
Greg Kurz 2019-12-04 20:43:48 +01:00 • committed by David Gibson
parent 4febcdd88f
commit c1ad0b892c
2 changed files with 5 additions and 15 deletions
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4
target/ppc/cpu.h
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@ -1090,7 +1090,9 @@ struct CPUPPCState {
#if !defined(CONFIG_USER_ONLY)
/*
* This is the IRQ controller, which is implementation dependent
* and only relevant when emulating a complete machine.
* and only relevant when emulating a complete machine. Note that
* this isn't used by recent Book3s compatible CPUs (POWER7 and
* newer).
*/
uint32_t irq_input_state;
void **irq_inputs;