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hw/mips_cmgcr: implement RESET_BASE register in CM GCR

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Implement RESET_BASE register which is local to each VP and a write to
it changes VP's reset exception base. Also, add OTHER register to
allow a software running on one VP to access other VP's local registers.

Guest can use this mechanism to specify custom address from which a VP
will start execution.

Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
This commit is contained in:
Leon Alrae 2016-06-09 10:46:52 +01:00
parent dff94251f0
commit c09199fe73
2 changed files with 71 additions and 1 deletions
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18
include/hw/misc/mips_cmgcr.h
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@ -35,6 +35,7 @@
/* Core Local and Core Other Block Register Map */
#define GCR_CL_CONFIG_OFS 0x0010
#define GCR_CL_OTHER_OFS 0x0018
#define GCR_CL_RESETBASE_OFS 0x0020
/* GCR_L2_CONFIG register fields */
#define GCR_L2_CONFIG_BYPASS_SHF 20
@ -50,6 +51,20 @@
#define GCR_CPC_BASE_CPCBASE_MSK 0xFFFFFFFF8000ULL
#define GCR_CPC_BASE_MSK (GCR_CPC_BASE_CPCEN_MSK | GCR_CPC_BASE_CPCBASE_MSK)
/* GCR_CL_OTHER_OFS register fields */
#define GCR_CL_OTHER_VPOTHER_MSK 0x7
#define GCR_CL_OTHER_MSK GCR_CL_OTHER_VPOTHER_MSK
/* GCR_CL_RESETBASE_OFS register fields */
#define GCR_CL_RESET_BASE_RESETBASE_MSK 0xFFFFF000U
#define GCR_CL_RESET_BASE_MSK GCR_CL_RESET_BASE_RESETBASE_MSK
typedef struct MIPSGCRVPState MIPSGCRVPState;
struct MIPSGCRVPState {
uint32_t other;
uint64_t reset_base;
};
typedef struct MIPSGCRState MIPSGCRState;
struct MIPSGCRState {
SysBusDevice parent_obj;
@ -63,6 +78,9 @@ struct MIPSGCRState {
uint64_t cpc_base;
uint64_t gic_base;
/* VP Local/Other Registers */
MIPSGCRVPState *vps;
};
#endif /* _MIPS_GCR_H */