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target/loongarch: Implement vhaddw/vhsubw
This patch includes: - VHADDW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU}; - VHSUBW.{H.B/W.H/D.W/Q.D/HU.BU/WU.HU/DU.WU/QU.DU}. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn> Message-Id: <20230504122810.4094787-9-gaosong@loongson.cn>
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5 changed files with 150 additions and 0 deletions
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*
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* Copyright (c) 2022-2023 Loongson Technology Corporation Limited
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/exec-all.h"
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#include "exec/helper-proto.h"
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#define DO_ADD(a, b) (a + b)
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#define DO_SUB(a, b) (a - b)
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#define DO_ODD_EVEN(NAME, BIT, E1, E2, DO_OP) \
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void HELPER(NAME)(CPULoongArchState *env, \
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uint32_t vd, uint32_t vj, uint32_t vk) \
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{ \
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int i; \
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VReg *Vd = &(env->fpr[vd].vreg); \
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VReg *Vj = &(env->fpr[vj].vreg); \
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VReg *Vk = &(env->fpr[vk].vreg); \
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typedef __typeof(Vd->E1(0)) TD; \
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\
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for (i = 0; i < LSX_LEN/BIT; i++) { \
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Vd->E1(i) = DO_OP((TD)Vj->E2(2 * i + 1), (TD)Vk->E2(2 * i)); \
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} \
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}
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DO_ODD_EVEN(vhaddw_h_b, 16, H, B, DO_ADD)
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DO_ODD_EVEN(vhaddw_w_h, 32, W, H, DO_ADD)
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DO_ODD_EVEN(vhaddw_d_w, 64, D, W, DO_ADD)
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void HELPER(vhaddw_q_d)(CPULoongArchState *env,
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uint32_t vd, uint32_t vj, uint32_t vk)
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{
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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VReg *Vk = &(env->fpr[vk].vreg);
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Vd->Q(0) = int128_add(int128_makes64(Vj->D(1)), int128_makes64(Vk->D(0)));
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}
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DO_ODD_EVEN(vhsubw_h_b, 16, H, B, DO_SUB)
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DO_ODD_EVEN(vhsubw_w_h, 32, W, H, DO_SUB)
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DO_ODD_EVEN(vhsubw_d_w, 64, D, W, DO_SUB)
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void HELPER(vhsubw_q_d)(CPULoongArchState *env,
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uint32_t vd, uint32_t vj, uint32_t vk)
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{
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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VReg *Vk = &(env->fpr[vk].vreg);
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Vd->Q(0) = int128_sub(int128_makes64(Vj->D(1)), int128_makes64(Vk->D(0)));
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}
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DO_ODD_EVEN(vhaddw_hu_bu, 16, UH, UB, DO_ADD)
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DO_ODD_EVEN(vhaddw_wu_hu, 32, UW, UH, DO_ADD)
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DO_ODD_EVEN(vhaddw_du_wu, 64, UD, UW, DO_ADD)
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void HELPER(vhaddw_qu_du)(CPULoongArchState *env,
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uint32_t vd, uint32_t vj, uint32_t vk)
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{
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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VReg *Vk = &(env->fpr[vk].vreg);
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Vd->Q(0) = int128_add(int128_make64((uint64_t)Vj->D(1)),
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int128_make64((uint64_t)Vk->D(0)));
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}
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DO_ODD_EVEN(vhsubw_hu_bu, 16, UH, UB, DO_SUB)
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DO_ODD_EVEN(vhsubw_wu_hu, 32, UW, UH, DO_SUB)
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DO_ODD_EVEN(vhsubw_du_wu, 64, UD, UW, DO_SUB)
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void HELPER(vhsubw_qu_du)(CPULoongArchState *env,
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uint32_t vd, uint32_t vj, uint32_t vk)
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{
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VReg *Vd = &(env->fpr[vd].vreg);
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VReg *Vj = &(env->fpr[vj].vreg);
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VReg *Vk = &(env->fpr[vk].vreg);
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Vd->Q(0) = int128_sub(int128_make64((uint64_t)Vj->D(1)),
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int128_make64((uint64_t)Vk->D(0)));
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}
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