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rust: pl011: simplify handling of the FIFO enabled bit in LCR

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Use ==/!= instead of going through bool and xor.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2024-12-04 21:49:34 +01:00
parent 6b4f7b0705
commit bf9987c06e
2 changed files with 2 additions and 10 deletions
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6
rust/hw/char/pl011/src/device.rs
View file

@ -302,9 +302,7 @@ impl PL011State {
Ok(LCR_H) => { Ok(LCR_H) => {
let new_val: registers::LineControl = value.into(); let new_val: registers::LineControl = value.into();
// Reset the FIFO state on FIFO enable or disable // Reset the FIFO state on FIFO enable or disable
if bool::from(self.line_control.fifos_enabled()) if self.line_control.fifos_enabled() != new_val.fifos_enabled() {
^ bool::from(new_val.fifos_enabled())
{
self.reset_rx_fifo(); self.reset_rx_fifo();
self.reset_tx_fifo(); self.reset_tx_fifo();
} }
@ -497,7 +495,7 @@ impl PL011State {
#[inline] #[inline]
pub fn fifo_enabled(&self) -> bool { pub fn fifo_enabled(&self) -> bool {
matches!(self.line_control.fifos_enabled(), registers::Mode::FIFO) self.line_control.fifos_enabled() == registers::Mode::FIFO
} }
#[inline] #[inline]

6
rust/hw/char/pl011/src/lib.rs
View file

@ -419,12 +419,6 @@ pub mod registers {
FIFO = 1, FIFO = 1,
} }
impl From<Mode> for bool {
fn from(val: Mode) -> Self {
matches!(val, Mode::FIFO)
}
}
#[bitsize(2)] #[bitsize(2)]
#[derive(Clone, Copy, Debug, Eq, FromBits, PartialEq)] #[derive(Clone, Copy, Debug, Eq, FromBits, PartialEq)]
/// `WLEN` Word length, field of [Line Control register](LineControl). /// `WLEN` Word length, field of [Line Control register](LineControl).