motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-04 16:23:55 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

target/m68k: Convert to 3-phase reset

Browse source 
Convert the m68k CPU class to use 3-phase reset, so it doesn't
need to use device_class_set_parent_reset() any more.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Message-id: 20221124115023.2437291-9-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2022-11-24 11:50:11 +00:00
parent f78b49ae8d
commit bf90b345d7
2 changed files with 10 additions and 6 deletions
Download patch file Download diff file Expand all files Collapse all files

12
target/m68k/cpu.c
View file

@ -66,16 +66,18 @@ static void m68k_unset_feature(CPUM68KState *env, int feature)
env->features &= ~BIT_ULL(feature);
}
static void m68k_cpu_reset(DeviceState *dev)
static void m68k_cpu_reset_hold(Object *obj)
{
CPUState *s = CPU(dev);
CPUState *s = CPU(obj);
M68kCPU *cpu = M68K_CPU(s);
M68kCPUClass *mcc = M68K_CPU_GET_CLASS(cpu);
CPUM68KState *env = &cpu->env;
floatx80 nan = floatx80_default_nan(NULL);
int i;
mcc->parent_reset(dev);
if (mcc->parent_phases.hold) {
mcc->parent_phases.hold(obj);
}
memset(env, 0, offsetof(CPUM68KState, end_reset_fields));
#ifdef CONFIG_SOFTMMU
@ -552,10 +554,12 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
M68kCPUClass *mcc = M68K_CPU_CLASS(c);
CPUClass *cc = CPU_CLASS(c);
DeviceClass *dc = DEVICE_CLASS(c);
ResettableClass *rc = RESETTABLE_CLASS(c);
device_class_set_parent_realize(dc, m68k_cpu_realizefn,
&mcc->parent_realize);
device_class_set_parent_reset(dc, m68k_cpu_reset, &mcc->parent_reset);
resettable_class_set_parent_phases(rc, NULL, m68k_cpu_reset_hold, NULL,
&mcc->parent_phases);
cc->class_by_name = m68k_cpu_class_by_name;
cc->has_work = m68k_cpu_has_work;