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s390x update:
- tcg: implement the vector enhancements facility and bump the 'qemu' cpu model to a stripped-down z14 GA2 - fix psw.mask handling in signals - fix vfio-ccw sense data handling -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEw9DWbcNiT/aowBjO3s9rk8bwL68FAmDQYXwSHGNvaHVja0By ZWRoYXQuY29tAAoJEN7Pa5PG8C+vrDAQALLimgzAm6br4SHP49T7ZsDkuhZwyYpP Fg09vxjMmKWgLOIQNp7Xd1vQJ5voGc5D0KleVMuX2feycfmon0yVeIBMan6DTcfr lygtiBYrgPWVAs36OXQ/rJUHt2ZUZaQsS57lTgn+Jtn7p+AMjiMrDlam+iqoAnU+ o5RtTFG+bhqa72WI7mCG54hRfXS1b/K8Ts1qs0oJJVDrDWlmLWfpjuJU3ehvhepA hJYnhIRQgbFHPsaJI47s25aa6KC+cGTGGRMl4YmFPACMh1KNXqmGP1XbxyEhz5tl LUdU9JRikbBsErcItHfZabGktLtBi7B9Vyh9KhxG9vK7ol8GUD4pomHrLNH2UUtH MyhTcuVCcEakuhgRr8GwA+7KO2Y3quqHDC3/kCkIarrE4X+YJl9Glv76we6XvbYL 4SAPE87Ub465C3J3tUjLDtfq8LpCIUh7zCYLBfk2Yf4pIbjnWMzUBu3UD2XYrKGF +g+J8ZVjE/WFsZzWUJL54lLuT8+FjPLgNOsth1WTENGUEK+JgWGpHbpR1XdqQFj8 f+bk1nrL94iq3KRdmCaO1w6vc+5xDG0tSY4tVJ1Nip1w3ZxmJFOUWGWLs04hz4mn WLx3vHbq3g1HZn9dtqwh6BvAP9fdLw2xkBcRtepR7vPM0ydqp2dvBbu99MrZN3H1 3Sa6lIpr4bII =bMQp -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/cohuck-gitlab/tags/s390x-20210621' into staging s390x update: - tcg: implement the vector enhancements facility and bump the 'qemu' cpu model to a stripped-down z14 GA2 - fix psw.mask handling in signals - fix vfio-ccw sense data handling # gpg: Signature made Mon 21 Jun 2021 10:53:00 BST # gpg: using RSA key C3D0D66DC3624FF6A8C018CEDECF6B93C6F02FAF # gpg: issuer "cohuck@redhat.com" # gpg: Good signature from "Cornelia Huck <conny@cornelia-huck.de>" [unknown] # gpg: aka "Cornelia Huck <huckc@linux.vnet.ibm.com>" [full] # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" [full] # gpg: aka "Cornelia Huck <cohuck@kernel.org>" [unknown] # gpg: aka "Cornelia Huck <cohuck@redhat.com>" [unknown] # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck-gitlab/tags/s390x-20210621: (37 commits) s390x/css: Add passthrough IRB s390x/css: Refactor IRB construction s390x/css: Split out the IRB sense data s390x/css: Introduce an ESW struct linux-user/s390x: Save and restore psw.mask properly target/s390x: Use s390_cpu_{set_psw, get_psw_mask} in gdbstub target/s390x: Improve s390_cpu_dump_state vs cc_op target/s390x: Do not modify cpu state in s390_cpu_get_psw_mask target/s390x: Expose load_psw and get_psw_mask to cpu.h configure: Check whether we can compile the s390-ccw bios with -msoft-float s390x/cpumodel: Bump up QEMU model to a stripped-down IBM z14 GA2 s390x/tcg: We support Vector enhancements facility linux-user: elf: s390x: Prepare for Vector enhancements facility s390x/tcg: Implement VECTOR FP (MAXIMUM|MINIMUM) s390x/tcg: Implement VECTOR FP NEGATIVE MULTIPLY AND (ADD|SUBTRACT) s390x/tcg: Implement 32/128 bit for VECTOR FP MULTIPLY AND (ADD|SUBTRACT) s390x/tcg: Implement 32/128 bit for VECTOR FP TEST DATA CLASS IMMEDIATE s390x/tcg: Implement 32/128 bit for VECTOR FP PERFORM SIGN OPERATION s390x/tcg: Implement 128 bit for VECTOR FP LOAD ROUNDED s390x/tcg: Implement 64 bit for VECTOR FP LOAD LENGTHENED ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
commit
bf7942e406
30 changed files with 1649 additions and 619 deletions
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@ -129,6 +129,7 @@ static void emulated_ccw_3270_realize(DeviceState *ds, Error **errp)
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EMULATED_CCW_3270_CHPID_TYPE);
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sch->do_subchannel_work = do_subchannel_work_virtual;
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sch->ccw_cb = emulated_ccw_3270_cb;
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sch->irb_cb = build_irb_virtual;
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ck->init(dev, &err);
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if (err) {
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@ -1335,6 +1335,14 @@ static void copy_schib_to_guest(SCHIB *dest, const SCHIB *src)
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}
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}
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void copy_esw_to_guest(ESW *dest, const ESW *src)
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{
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dest->word0 = cpu_to_be32(src->word0);
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dest->erw = cpu_to_be32(src->erw);
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dest->word2 = cpu_to_be64(src->word2);
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dest->word4 = cpu_to_be32(src->word4);
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}
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IOInstEnding css_do_stsch(SubchDev *sch, SCHIB *schib)
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{
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int ret;
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@ -1604,9 +1612,8 @@ static void copy_irb_to_guest(IRB *dest, const IRB *src, const PMCW *pmcw,
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copy_scsw_to_guest(&dest->scsw, &src->scsw);
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for (i = 0; i < ARRAY_SIZE(dest->esw); i++) {
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dest->esw[i] = cpu_to_be32(src->esw[i]);
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}
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copy_esw_to_guest(&dest->esw, &src->esw);
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for (i = 0; i < ARRAY_SIZE(dest->ecw); i++) {
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dest->ecw[i] = cpu_to_be32(src->ecw[i]);
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}
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@ -1632,6 +1639,55 @@ static void copy_irb_to_guest(IRB *dest, const IRB *src, const PMCW *pmcw,
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*irb_len = sizeof(*dest);
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}
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static void build_irb_sense_data(SubchDev *sch, IRB *irb)
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{
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int i;
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/* Attention: sense_data is already BE! */
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memcpy(irb->ecw, sch->sense_data, sizeof(sch->sense_data));
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for (i = 0; i < ARRAY_SIZE(irb->ecw); i++) {
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irb->ecw[i] = be32_to_cpu(irb->ecw[i]);
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}
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}
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void build_irb_passthrough(SubchDev *sch, IRB *irb)
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{
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/* Copy ESW from hardware */
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irb->esw = sch->esw;
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/*
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* If (irb->esw.erw & ESW_ERW_SENSE) is true, then the contents
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* of the ECW is sense data. If false, then it is model-dependent
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* information. Either way, copy it into the IRB for the guest to
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* read/decide what to do with.
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*/
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build_irb_sense_data(sch, irb);
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}
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void build_irb_virtual(SubchDev *sch, IRB *irb)
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{
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SCHIB *schib = &sch->curr_status;
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uint16_t stctl = schib->scsw.ctrl & SCSW_CTRL_MASK_STCTL;
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if (stctl & SCSW_STCTL_STATUS_PEND) {
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if (schib->scsw.cstat & (SCSW_CSTAT_DATA_CHECK |
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SCSW_CSTAT_CHN_CTRL_CHK |
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SCSW_CSTAT_INTF_CTRL_CHK)) {
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irb->scsw.flags |= SCSW_FLAGS_MASK_ESWF;
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irb->esw.word0 = 0x04804000;
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} else {
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irb->esw.word0 = 0x00800000;
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}
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/* If a unit check is pending, copy sense data. */
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if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) &&
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(schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) {
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irb->scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
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build_irb_sense_data(sch, irb);
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irb->esw.erw = ESW_ERW_SENSE | (sizeof(sch->sense_data) << 8);
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}
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}
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}
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int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
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{
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SCHIB *schib = &sch->curr_status;
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@ -1650,29 +1706,12 @@ int css_do_tsch_get_irb(SubchDev *sch, IRB *target_irb, int *irb_len)
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/* Copy scsw from current status. */
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irb.scsw = schib->scsw;
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if (stctl & SCSW_STCTL_STATUS_PEND) {
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if (schib->scsw.cstat & (SCSW_CSTAT_DATA_CHECK |
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SCSW_CSTAT_CHN_CTRL_CHK |
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SCSW_CSTAT_INTF_CTRL_CHK)) {
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irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF;
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irb.esw[0] = 0x04804000;
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} else {
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irb.esw[0] = 0x00800000;
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}
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/* If a unit check is pending, copy sense data. */
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if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) &&
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(schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) {
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int i;
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irb.scsw.flags |= SCSW_FLAGS_MASK_ESWF | SCSW_FLAGS_MASK_ECTL;
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/* Attention: sense_data is already BE! */
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memcpy(irb.ecw, sch->sense_data, sizeof(sch->sense_data));
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for (i = 0; i < ARRAY_SIZE(irb.ecw); i++) {
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irb.ecw[i] = be32_to_cpu(irb.ecw[i]);
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}
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irb.esw[1] = 0x01000000 | (sizeof(sch->sense_data) << 8);
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}
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/* Build other IRB data, if necessary */
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if (sch->irb_cb) {
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sch->irb_cb(sch, &irb);
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}
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/* Store the irb to the guest. */
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p = schib->pmcw;
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copy_irb_to_guest(target_irb, &irb, &p, irb_len);
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@ -124,6 +124,7 @@ static void s390_ccw_realize(S390CCWDevice *cdev, char *sysfsdev, Error **errp)
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}
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sch->driver_data = cdev;
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sch->do_subchannel_work = do_subchannel_work_passthrough;
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sch->irb_cb = build_irb_passthrough;
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ccw_dev->sch = sch;
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ret = css_sch_build_schib(sch, &cdev->hostid);
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@ -802,7 +802,10 @@ DEFINE_CCW_MACHINE(6_1, "6.1", true);
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static void ccw_machine_6_0_instance_options(MachineState *machine)
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{
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static const S390FeatInit qemu_cpu_feat = { S390_FEAT_LIST_QEMU_V6_0 };
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ccw_machine_6_1_instance_options(machine);
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s390_set_qemu_cpu_model(0x2964, 13, 2, qemu_cpu_feat);
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}
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static void ccw_machine_6_0_class_options(MachineClass *mc)
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@ -753,6 +753,7 @@ static void virtio_ccw_device_realize(VirtioCcwDevice *dev, Error **errp)
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sch->id.reserved = 0xff;
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sch->id.cu_type = VIRTIO_CCW_CU_TYPE;
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sch->do_subchannel_work = do_subchannel_work_virtual;
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sch->irb_cb = build_irb_virtual;
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ccw_dev->sch = sch;
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dev->indicators = NULL;
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dev->revision = -1;
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@ -321,6 +321,7 @@ static void vfio_ccw_io_notifier_handler(void *opaque)
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SCHIB *schib = &sch->curr_status;
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SCSW s;
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IRB irb;
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ESW esw;
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int size;
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if (!event_notifier_test_and_clear(&vcdev->io_notifier)) {
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copy_scsw_to_guest(&s, &irb.scsw);
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schib->scsw = s;
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copy_esw_to_guest(&esw, &irb.esw);
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sch->esw = esw;
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/* If a uint check is pending, copy sense data. */
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if ((schib->scsw.dstat & SCSW_DSTAT_UNIT_CHECK) &&
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(schib->pmcw.chars & PMCW_CHARS_MASK_CSENSE)) {
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