mirror of
https://github.com/Motorhead1991/qemu.git
synced 2026-02-27 06:35:23 -07:00
Spelling fixes, spotted by Stuart Brady.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
b3c7724cbc
commit
bf20dc076b
9 changed files with 18 additions and 18 deletions
12
exec.c
12
exec.c
|
|
@ -109,7 +109,7 @@ CPUState *first_cpu;
|
|||
cpu_exec() */
|
||||
CPUState *cpu_single_env;
|
||||
/* 0 = Do not count executed instructions.
|
||||
1 = Precice instruction counting.
|
||||
1 = Precise instruction counting.
|
||||
2 = Adaptive rate instruction counting. */
|
||||
int use_icount = 0;
|
||||
/* Current instruction counter. While executing translated code this may
|
||||
|
|
@ -1080,7 +1080,7 @@ TranslationBlock *tb_alloc(target_ulong pc)
|
|||
|
||||
void tb_free(TranslationBlock *tb)
|
||||
{
|
||||
/* In practice this is mostly used for single use temorary TB
|
||||
/* In practice this is mostly used for single use temporary TB
|
||||
Ignore the hard cases and just back up if this TB happens to
|
||||
be the last one generated. */
|
||||
if (nb_tbs > 0 && tb == &tbs[nb_tbs - 1]) {
|
||||
|
|
@ -1394,7 +1394,7 @@ void cpu_interrupt(CPUState *env, int mask)
|
|||
|
||||
old_mask = env->interrupt_request;
|
||||
/* FIXME: This is probably not threadsafe. A different thread could
|
||||
be in the mittle of a read-modify-write operation. */
|
||||
be in the middle of a read-modify-write operation. */
|
||||
env->interrupt_request |= mask;
|
||||
#if defined(USE_NPTL)
|
||||
/* FIXME: TB unchaining isn't SMP safe. For now just ignore the
|
||||
|
|
@ -3019,13 +3019,13 @@ void cpu_io_recompile(CPUState *env, void *retaddr)
|
|||
n = env->icount_decr.u16.low + tb->icount;
|
||||
cpu_restore_state(tb, env, (unsigned long)retaddr, NULL);
|
||||
/* Calculate how many instructions had been executed before the fault
|
||||
occured. */
|
||||
occurred. */
|
||||
n = n - env->icount_decr.u16.low;
|
||||
/* Generate a new TB ending on the I/O insn. */
|
||||
n++;
|
||||
/* On MIPS and SH, delay slot instructions can only be restarted if
|
||||
they were already the first instruction in the TB. If this is not
|
||||
the first instruction in a TB then re-execute the preceeding
|
||||
the first instruction in a TB then re-execute the preceding
|
||||
branch. */
|
||||
#if defined(TARGET_MIPS)
|
||||
if ((env->hflags & MIPS_HFLAG_BMASK) != 0 && n > 1) {
|
||||
|
|
@ -3053,7 +3053,7 @@ void cpu_io_recompile(CPUState *env, void *retaddr)
|
|||
/* FIXME: In theory this could raise an exception. In practice
|
||||
we have already translated the block once so it's probably ok. */
|
||||
tb_gen_code(env, pc, cs_base, flags, cflags);
|
||||
/* TODO: If env->pc != tb->pc (i.e. the failuting instruction was not
|
||||
/* TODO: If env->pc != tb->pc (i.e. the faulting instruction was not
|
||||
the first in the TB) then we end up generating a whole new TB and
|
||||
repeating the fault, which is horribly inefficient.
|
||||
Better would be to execute just this insn uncached, or generate a
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue