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hw/char/riscv_htif: Explicit little-endian implementation
Since our RISC-V system emulation is only built for little endian, the HTIF device aims to interface with little endian memory accesses, thus we can explicit htif_mm_ops:endianness being DEVICE_LITTLE_ENDIAN. In that case tswap64() is equivalent to le64_to_cpu(), as in "convert this 64-bit little-endian value into host cpu order". Replace to simplify. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20241129154304.34946-3-philmd@linaro.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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1 changed files with 6 additions and 5 deletions
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@ -29,7 +29,7 @@
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#include "qemu/timer.h"
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#include "qemu/error-report.h"
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#include "exec/address-spaces.h"
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#include "exec/tswap.h"
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#include "qemu/bswap.h"
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#include "sysemu/dma.h"
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#include "sysemu/runstate.h"
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@ -212,11 +212,11 @@ static void htif_handle_tohost_write(HTIFState *s, uint64_t val_written)
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} else {
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uint64_t syscall[8];
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cpu_physical_memory_read(payload, syscall, sizeof(syscall));
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if (tswap64(syscall[0]) == PK_SYS_WRITE &&
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tswap64(syscall[1]) == HTIF_DEV_CONSOLE &&
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tswap64(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
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if (le64_to_cpu(syscall[0]) == PK_SYS_WRITE &&
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le64_to_cpu(syscall[1]) == HTIF_DEV_CONSOLE &&
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le64_to_cpu(syscall[3]) == HTIF_CONSOLE_CMD_PUTC) {
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uint8_t ch;
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cpu_physical_memory_read(tswap64(syscall[2]), &ch, 1);
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cpu_physical_memory_read(le64_to_cpu(syscall[2]), &ch, 1);
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/*
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* XXX this blocks entire thread. Rewrite to use
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* qemu_chr_fe_write and background I/O callbacks
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@ -324,6 +324,7 @@ static void htif_mm_write(void *opaque, hwaddr addr,
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static const MemoryRegionOps htif_mm_ops = {
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.read = htif_mm_read,
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.write = htif_mm_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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HTIFState *htif_mm_init(MemoryRegion *address_space, Chardev *chr,
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