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arm: fix location of some include files
The recent rearrangement of include files had some minor errors: devices.h is not ARM specific and should not be in arm/ arm.h should be in arm/ Move these two headers to correct this. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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49 changed files with 62 additions and 62 deletions
70
include/hw/arm/arm.h
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70
include/hw/arm/arm.h
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/*
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* Misc ARM declarations
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*
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* Copyright (c) 2006 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licensed under the LGPL.
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*
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*/
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#ifndef ARM_MISC_H
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#define ARM_MISC_H 1
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#include "exec/memory.h"
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#include "hw/irq.h"
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/* The CPU is also modelled as an interrupt controller. */
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#define ARM_PIC_CPU_IRQ 0
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#define ARM_PIC_CPU_FIQ 1
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qemu_irq *arm_pic_init_cpu(ARMCPU *cpu);
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/* armv7m.c */
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qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
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int flash_size, int sram_size,
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const char *kernel_filename, const char *cpu_model);
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/* arm_boot.c */
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struct arm_boot_info {
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uint64_t ram_size;
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const char *kernel_filename;
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const char *kernel_cmdline;
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const char *initrd_filename;
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const char *dtb_filename;
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hwaddr loader_start;
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/* multicore boards that use the default secondary core boot functions
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* need to put the address of the secondary boot code, the boot reg,
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* and the GIC address in the next 3 values, respectively. boards that
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* have their own boot functions can use these values as they want.
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*/
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hwaddr smp_loader_start;
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hwaddr smp_bootreg_addr;
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hwaddr gic_cpu_if_addr;
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int nb_cpus;
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int board_id;
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int (*atag_board)(const struct arm_boot_info *info, void *p);
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/* multicore boards that use the default secondary core boot functions
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* can ignore these two function calls. If the default functions won't
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* work, then write_secondary_boot() should write a suitable blob of
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* code mimicking the secondary CPU startup process used by the board's
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* boot loader/boot ROM code, and secondary_cpu_reset_hook() should
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* perform any necessary CPU reset handling and set the PC for the
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* secondary CPUs to point at this boot blob.
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*/
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void (*write_secondary_boot)(ARMCPU *cpu,
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const struct arm_boot_info *info);
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void (*secondary_cpu_reset_hook)(ARMCPU *cpu,
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const struct arm_boot_info *info);
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/* Used internally by arm_boot.c */
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int is_linux;
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hwaddr initrd_start;
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hwaddr initrd_size;
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hwaddr entry;
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};
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void arm_load_kernel(ARMCPU *cpu, struct arm_boot_info *info);
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/* Multiplication factor to convert from system clock ticks to qemu timer
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ticks. */
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extern int system_clock_scale;
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#endif /* !ARM_MISC_H */
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@ -1,70 +0,0 @@
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#ifndef QEMU_DEVICES_H
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#define QEMU_DEVICES_H
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#include "hw/irq.h"
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/* ??? Not all users of this file can include cpu-common.h. */
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struct MemoryRegion;
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/* Devices that have nowhere better to go. */
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/* smc91c111.c */
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void smc91c111_init(NICInfo *, uint32_t, qemu_irq);
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/* lan9118.c */
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void lan9118_init(NICInfo *, uint32_t, qemu_irq);
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/* tsc210x.c */
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uWireSlave *tsc2102_init(qemu_irq pint);
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uWireSlave *tsc2301_init(qemu_irq penirq, qemu_irq kbirq, qemu_irq dav);
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I2SCodec *tsc210x_codec(uWireSlave *chip);
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uint32_t tsc210x_txrx(void *opaque, uint32_t value, int len);
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void tsc210x_set_transform(uWireSlave *chip,
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MouseTransformInfo *info);
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void tsc210x_key_event(uWireSlave *chip, int key, int down);
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/* tsc2005.c */
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void *tsc2005_init(qemu_irq pintdav);
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uint32_t tsc2005_txrx(void *opaque, uint32_t value, int len);
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void tsc2005_set_transform(void *opaque, MouseTransformInfo *info);
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/* stellaris_input.c */
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void stellaris_gamepad_init(int n, qemu_irq *irq, const int *keycode);
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/* blizzard.c */
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void *s1d13745_init(qemu_irq gpio_int);
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void s1d13745_write(void *opaque, int dc, uint16_t value);
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void s1d13745_write_block(void *opaque, int dc,
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void *buf, size_t len, int pitch);
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uint16_t s1d13745_read(void *opaque, int dc);
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/* cbus.c */
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typedef struct {
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qemu_irq clk;
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qemu_irq dat;
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qemu_irq sel;
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} CBus;
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CBus *cbus_init(qemu_irq dat_out);
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void cbus_attach(CBus *bus, void *slave_opaque);
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void *retu_init(qemu_irq irq, int vilma);
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void *tahvo_init(qemu_irq irq, int betty);
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void retu_key_event(void *retu, int state);
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/* tc6393xb.c */
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typedef struct TC6393xbState TC6393xbState;
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#define TC6393XB_RAM 0x110000 /* amount of ram for Video and USB */
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TC6393xbState *tc6393xb_init(struct MemoryRegion *sysmem,
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uint32_t base, qemu_irq irq);
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void tc6393xb_gpio_out_set(TC6393xbState *s, int line,
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qemu_irq handler);
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qemu_irq *tc6393xb_gpio_in_get(TC6393xbState *s);
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qemu_irq tc6393xb_l3v_get(TC6393xbState *s);
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/* sm501.c */
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void sm501_init(struct MemoryRegion *address_space_mem, uint32_t base,
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uint32_t local_mem_bytes, qemu_irq irq,
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CharDriverState *chr);
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#endif
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