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target/hppa: Enhancements and fixes
Some enhancements and fixes for the hppa target. The major change is, that this patchset adds a new SeaBIOS-hppa firmware which is built as 32- and 64-bit firmware. The new 64-bit firmware is necessary to fully support 64-bit operating systems (HP-UX, Linux, NetBSD,...). -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZcquAQAKCRD3ErUQojoP X9pjAQCVsWyuYlGCW2paIGVWKV0vsOpwetUrbhRtFUZGqZxb4AD9FbMsXRcCN/oq CotBPY/a8MEzIQcwYl5QbcI5nNW4ygs= =RA0B -----END PGP SIGNATURE----- Merge tag 'hppa64-pull-request' of https://github.com/hdeller/qemu-hppa into staging target/hppa: Enhancements and fixes Some enhancements and fixes for the hppa target. The major change is, that this patchset adds a new SeaBIOS-hppa firmware which is built as 32- and 64-bit firmware. The new 64-bit firmware is necessary to fully support 64-bit operating systems (HP-UX, Linux, NetBSD,...). # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQS86RI+GtKfB8BJu973ErUQojoPXwUCZcquAQAKCRD3ErUQojoP # X9pjAQCVsWyuYlGCW2paIGVWKV0vsOpwetUrbhRtFUZGqZxb4AD9FbMsXRcCN/oq # CotBPY/a8MEzIQcwYl5QbcI5nNW4ygs= # =RA0B # -----END PGP SIGNATURE----- # gpg: Signature made Mon 12 Feb 2024 23:47:13 GMT # gpg: using EDDSA key BCE9123E1AD29F07C049BBDEF712B510A23A0F5F # gpg: Good signature from "Helge Deller <deller@gmx.de>" [unknown] # gpg: aka "Helge Deller <deller@kernel.org>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 4544 8228 2CD9 10DB EF3D 25F8 3E5F 3D04 A7A2 4603 # Subkey fingerprint: BCE9 123E 1AD2 9F07 C049 BBDE F712 B510 A23A 0F5F * tag 'hppa64-pull-request' of https://github.com/hdeller/qemu-hppa: hw/hppa/machine: Load 64-bit firmware on 64-bit machines target/hppa: Update SeaBIOS-hppa to version 16 hw/net/tulip: add chip status register values target/hppa: PDC_BTLB_INFO uses 32-bit ints target/hppa: Allow read-access to PSW with rsm 0,reg instruction lasi: Add reset I/O ports for LASI audio and FDC target/hppa: Implement do_transaction_failed handler for I/O errors lasi: allow access to LAN MAC address registers hw/pci-host/astro: Implement Hard Fail and Soft Fail mode hw/pci-host/astro: Avoid aborting on access failure target/hppa: Add "diag 0x101" for console output support disas/hppa: Add disassembly for qemu specific instructions Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
bc2e8b18fb
16 changed files with 150 additions and 43 deletions
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@ -13,6 +13,7 @@
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#include "qemu/error-report.h"
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#include "sysemu/reset.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/qtest.h"
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#include "sysemu/runstate.h"
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#include "hw/rtc/mc146818rtc.h"
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#include "hw/timer/i8254.h"
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@ -333,6 +334,7 @@ static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus,
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const char *kernel_filename = machine->kernel_filename;
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const char *kernel_cmdline = machine->kernel_cmdline;
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const char *initrd_filename = machine->initrd_filename;
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const char *firmware = machine->firmware;
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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DeviceState *dev;
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PCIDevice *pci_dev;
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@ -408,31 +410,37 @@ static void machine_HP_common_init_tail(MachineState *machine, PCIBus *pci_bus,
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/* Load firmware. Given that this is not "real" firmware,
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but one explicitly written for the emulation, we might as
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well load it directly from an ELF image. */
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firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS,
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machine->firmware ?: "hppa-firmware.img");
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if (firmware_filename == NULL) {
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error_report("no firmware provided");
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exit(1);
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}
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well load it directly from an ELF image. Load the 64-bit
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firmware on 64-bit machines by default if not specified
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on command line. */
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if (!qtest_enabled()) {
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if (!firmware) {
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firmware = lasi_dev ? "hppa-firmware.img" : "hppa-firmware64.img";
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}
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firmware_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware);
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if (firmware_filename == NULL) {
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error_report("no firmware provided");
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exit(1);
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}
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size = load_elf(firmware_filename, NULL, translate, NULL,
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&firmware_entry, &firmware_low, &firmware_high, NULL,
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true, EM_PARISC, 0, 0);
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size = load_elf(firmware_filename, NULL, translate, NULL,
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&firmware_entry, &firmware_low, &firmware_high, NULL,
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true, EM_PARISC, 0, 0);
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if (size < 0) {
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error_report("could not load firmware '%s'", firmware_filename);
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exit(1);
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if (size < 0) {
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error_report("could not load firmware '%s'", firmware_filename);
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exit(1);
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}
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qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
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"-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
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firmware_low, firmware_high, firmware_entry);
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if (firmware_low < translate(NULL, FIRMWARE_START) ||
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firmware_high >= translate(NULL, FIRMWARE_END)) {
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error_report("Firmware overlaps with memory or IO space");
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exit(1);
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}
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g_free(firmware_filename);
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}
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qemu_log_mask(CPU_LOG_PAGE, "Firmware loaded at 0x%08" PRIx64
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"-0x%08" PRIx64 ", entry at 0x%08" PRIx64 ".\n",
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firmware_low, firmware_high, firmware_entry);
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if (firmware_low < translate(NULL, FIRMWARE_START) ||
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firmware_high >= translate(NULL, FIRMWARE_END)) {
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error_report("Firmware overlaps with memory or IO space");
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exit(1);
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}
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g_free(firmware_filename);
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rom_region = g_new(MemoryRegion, 1);
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memory_region_init_ram(rom_region, NULL, "firmware",
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@ -36,9 +36,13 @@ static bool lasi_chip_mem_valid(void *opaque, hwaddr addr,
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case LASI_IAR:
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case LASI_LPT:
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case LASI_AUDIO:
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case LASI_AUDIO + 4:
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case LASI_UART:
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case LASI_LAN:
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case LASI_LAN + 12: /* LASI LAN MAC */
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case LASI_RTC:
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case LASI_FDC:
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case LASI_PCR ... LASI_AMR:
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ret = true;
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@ -78,6 +82,8 @@ static MemTxResult lasi_chip_read_with_attrs(void *opaque, hwaddr addr,
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case LASI_LPT:
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case LASI_UART:
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case LASI_LAN:
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case LASI_LAN + 12:
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case LASI_FDC:
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val = 0;
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break;
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case LASI_RTC:
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@ -143,12 +149,19 @@ static MemTxResult lasi_chip_write_with_attrs(void *opaque, hwaddr addr,
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case LASI_LPT:
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/* XXX: reset parallel port */
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break;
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case LASI_AUDIO:
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case LASI_AUDIO + 4:
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/* XXX: reset audio port */
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break;
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case LASI_UART:
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/* XXX: reset serial port */
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break;
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case LASI_LAN:
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/* XXX: reset LAN card */
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break;
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case LASI_FDC:
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/* XXX: reset Floppy controller */
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break;
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case LASI_RTC:
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s->rtc_ref = val - time(NULL);
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break;
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@ -421,7 +421,7 @@ static uint16_t tulip_mdi_default[] = {
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/* MDI Registers 8 - 15 */
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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/* MDI Registers 16 - 31 */
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0x0003, 0x0000, 0x0001, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0003, 0x0000, 0x0001, 0x0000, 0x3b40, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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};
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@ -429,7 +429,7 @@ static uint16_t tulip_mdi_default[] = {
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static const uint16_t tulip_mdi_mask[] = {
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0x0000, 0xffff, 0xffff, 0xffff, 0xc01f, 0xffff, 0xffff, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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0x0fff, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
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0x0fff, 0x0000, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
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0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
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};
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@ -122,10 +122,6 @@ static MemTxResult elroy_chip_read_with_attrs(void *opaque, hwaddr addr,
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case 0x0800: /* IOSAPIC_REG_SELECT */
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val = s->iosapic_reg_select;
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break;
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case 0x0808:
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val = UINT64_MAX; /* XXX: tbc. */
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g_assert_not_reached();
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break;
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case 0x0810: /* IOSAPIC_REG_WINDOW */
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switch (s->iosapic_reg_select) {
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case 0x01: /* IOSAPIC_REG_VERSION */
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@ -135,15 +131,21 @@ static MemTxResult elroy_chip_read_with_attrs(void *opaque, hwaddr addr,
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if (s->iosapic_reg_select < ARRAY_SIZE(s->iosapic_reg)) {
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val = s->iosapic_reg[s->iosapic_reg_select];
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} else {
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trace_iosapic_reg_read(s->iosapic_reg_select, size, val);
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g_assert_not_reached();
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goto check_hf;
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}
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}
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trace_iosapic_reg_read(s->iosapic_reg_select, size, val);
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break;
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default:
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trace_elroy_read(addr, size, val);
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g_assert_not_reached();
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check_hf:
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if (s->status_control & HF_ENABLE) {
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val = 0;
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ret = MEMTX_DECODE_ERROR;
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} else {
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/* return -1ULL if HardFail is disabled */
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val = ~0;
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ret = MEMTX_OK;
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}
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}
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trace_elroy_read(addr, size, val);
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@ -191,7 +193,7 @@ static MemTxResult elroy_chip_write_with_attrs(void *opaque, hwaddr addr,
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if (s->iosapic_reg_select < ARRAY_SIZE(s->iosapic_reg)) {
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s->iosapic_reg[s->iosapic_reg_select] = val;
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} else {
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g_assert_not_reached();
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goto check_hf;
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}
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break;
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case 0x0840: /* IOSAPIC_REG_EOI */
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@ -204,7 +206,10 @@ static MemTxResult elroy_chip_write_with_attrs(void *opaque, hwaddr addr,
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}
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break;
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default:
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g_assert_not_reached();
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check_hf:
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if (s->status_control & HF_ENABLE) {
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return MEMTX_DECODE_ERROR;
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}
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}
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return MEMTX_OK;
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}
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@ -594,8 +599,8 @@ static MemTxResult astro_chip_read_with_attrs(void *opaque, hwaddr addr,
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#undef EMPTY_PORT
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default:
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trace_astro_chip_read(addr, size, val);
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g_assert_not_reached();
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val = 0;
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ret = MEMTX_DECODE_ERROR;
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}
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/* for 32-bit accesses mask return value */
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@ -610,6 +615,7 @@ static MemTxResult astro_chip_write_with_attrs(void *opaque, hwaddr addr,
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uint64_t val, unsigned size,
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MemTxAttrs attrs)
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{
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MemTxResult ret = MEMTX_OK;
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AstroState *s = opaque;
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trace_astro_chip_write(addr, size, val);
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@ -686,11 +692,9 @@ static MemTxResult astro_chip_write_with_attrs(void *opaque, hwaddr addr,
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#undef EMPTY_PORT
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default:
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/* Controlled by astro_chip_mem_valid above. */
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trace_astro_chip_write(addr, size, val);
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g_assert_not_reached();
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ret = MEMTX_DECODE_ERROR;
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}
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return MEMTX_OK;
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return ret;
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}
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static const MemoryRegionOps astro_chip_ops = {
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