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target/loongarch: Add fixed point load/store instruction translation

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This includes:
- LD.{B[U]/H[U]/W[U]/D}, ST.{B/H/W/D}
- LDX.{B[U]/H[U]/W[U]/D}, STX.{B/H/W/D}
- LDPTR.{W/D}, STPTR.{W/D}
- PRELD
- LD{GT/LE}.{B/H/W/D}, ST{GT/LE}.{B/H/W/D}
- DBAR, IBAR

Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220606124333.2060567-8-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Song Gao 2022-06-06 20:42:57 +08:00 • committed by Richard Henderson
parent ad08cb3f97
commit bb79174d4e
5 changed files with 308 additions and 0 deletions
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55
target/loongarch/insns.decode
View file

@ -8,21 +8,25 @@
#
# Fields
#
%i14s2 10:s14 !function=shl_2
%sa2p1 15:2 !function=plus_1
#
# Argument sets
#
&i imm
&r_i rd imm
&rr rd rj
&rrr rd rj rk
&rr_i rd rj imm
&hint_r_i hint rj imm
&rrr_sa rd rj rk sa
&rr_ms_ls rd rj ms ls
#
# Formats
#
@i15 .... ........ ..... imm:15 &i
@rr .... ........ ..... ..... rj:5 rd:5 &rr
@rrr .... ........ ..... rk:5 rj:5 rd:5 &rrr
@r_i20 .... ... imm:s20 rd:5 &r_i
@ -30,7 +34,9 @@
@rr_ui6 .... ........ .... imm:6 rj:5 rd:5 &rr_i
@rr_i12 .... ...... imm:s12 rj:5 rd:5 &rr_i
@rr_ui12 .... ...... imm:12 rj:5 rd:5 &rr_i
@rr_i14s2 .... .... .............. rj:5 rd:5 &rr_i imm=%i14s2
@rr_i16 .... .. imm:s16 rj:5 rd:5 &rr_i
@hint_r_i12 .... ...... imm:s12 rj:5 hint:5 &hint_r_i
@rrr_sa2p1 .... ........ ... .. rk:5 rj:5 rd:5 &rrr_sa sa=%sa2p1
@rrr_sa2 .... ........ ... sa:2 rk:5 rj:5 rd:5 &rrr_sa
@rrr_sa3 .... ........ .. sa:3 rk:5 rj:5 rd:5 &rrr_sa
@ -138,3 +144,52 @@ bstrins_w 0000 0000011 ..... 0 ..... ..... ..... @rr_2bw
bstrpick_w 0000 0000011 ..... 1 ..... ..... ..... @rr_2bw
bstrins_d 0000 000010 ...... ...... ..... ..... @rr_2bd
bstrpick_d 0000 000011 ...... ...... ..... ..... @rr_2bd
#
# Fixed point load/store instruction
#
ld_b 0010 100000 ............ ..... ..... @rr_i12
ld_h 0010 100001 ............ ..... ..... @rr_i12
ld_w 0010 100010 ............ ..... ..... @rr_i12
ld_d 0010 100011 ............ ..... ..... @rr_i12
st_b 0010 100100 ............ ..... ..... @rr_i12
st_h 0010 100101 ............ ..... ..... @rr_i12
st_w 0010 100110 ............ ..... ..... @rr_i12
st_d 0010 100111 ............ ..... ..... @rr_i12
ld_bu 0010 101000 ............ ..... ..... @rr_i12
ld_hu 0010 101001 ............ ..... ..... @rr_i12
ld_wu 0010 101010 ............ ..... ..... @rr_i12
ldx_b 0011 10000000 00000 ..... ..... ..... @rrr
ldx_h 0011 10000000 01000 ..... ..... ..... @rrr
ldx_w 0011 10000000 10000 ..... ..... ..... @rrr
ldx_d 0011 10000000 11000 ..... ..... ..... @rrr
stx_b 0011 10000001 00000 ..... ..... ..... @rrr
stx_h 0011 10000001 01000 ..... ..... ..... @rrr
stx_w 0011 10000001 10000 ..... ..... ..... @rrr
stx_d 0011 10000001 11000 ..... ..... ..... @rrr
ldx_bu 0011 10000010 00000 ..... ..... ..... @rrr
ldx_hu 0011 10000010 01000 ..... ..... ..... @rrr
ldx_wu 0011 10000010 10000 ..... ..... ..... @rrr
preld 0010 101011 ............ ..... ..... @hint_r_i12
dbar 0011 10000111 00100 ............... @i15
ibar 0011 10000111 00101 ............... @i15
ldptr_w 0010 0100 .............. ..... ..... @rr_i14s2
stptr_w 0010 0101 .............. ..... ..... @rr_i14s2
ldptr_d 0010 0110 .............. ..... ..... @rr_i14s2
stptr_d 0010 0111 .............. ..... ..... @rr_i14s2
ldgt_b 0011 10000111 10000 ..... ..... ..... @rrr
ldgt_h 0011 10000111 10001 ..... ..... ..... @rrr
ldgt_w 0011 10000111 10010 ..... ..... ..... @rrr
ldgt_d 0011 10000111 10011 ..... ..... ..... @rrr
ldle_b 0011 10000111 10100 ..... ..... ..... @rrr
ldle_h 0011 10000111 10101 ..... ..... ..... @rrr
ldle_w 0011 10000111 10110 ..... ..... ..... @rrr
ldle_d 0011 10000111 10111 ..... ..... ..... @rrr
stgt_b 0011 10000111 11000 ..... ..... ..... @rrr
stgt_h 0011 10000111 11001 ..... ..... ..... @rrr
stgt_w 0011 10000111 11010 ..... ..... ..... @rrr
stgt_d 0011 10000111 11011 ..... ..... ..... @rrr
stle_b 0011 10000111 11100 ..... ..... ..... @rrr
stle_h 0011 10000111 11101 ..... ..... ..... @rrr
stle_w 0011 10000111 11110 ..... ..... ..... @rrr
stle_d 0011 10000111 11111 ..... ..... ..... @rrr