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softfloat: Add float16 type and float16 NaN handling functions

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Add a float16 type to softfloat, rather than using bits16 directly.
Also add the missing functions float16_is_quiet_nan(),
float16_is_signaling_nan() and float16_maybe_silence_nan(),
which are needed for the float16 conversion routines.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Peter Maydell 2011-02-10 11:28:56 +00:00 • committed by Aurelien Jarno
parent d1a1eb7472
commit bb4d4bb376
4 changed files with 118 additions and 12 deletions
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44
fpu/softfloat.c
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@ -66,6 +66,33 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM)
}
#endif
/*----------------------------------------------------------------------------
| Returns the fraction bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE uint32_t extractFloat16Frac(float16 a)
{
return float16_val(a) & 0x3ff;
}
/*----------------------------------------------------------------------------
| Returns the exponent bits of the half-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE int16 extractFloat16Exp(float16 a)
{
return (float16_val(a) >> 10) & 0x1f;
}
/*----------------------------------------------------------------------------
| Returns the sign bit of the single-precision floating-point value `a'.
*----------------------------------------------------------------------------*/
INLINE flag extractFloat16Sign(float16 a)
{
return float16_val(a)>>15;
}
/*----------------------------------------------------------------------------
| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6
| and 7, and returns the properly rounded 32-bit integer corresponding to the
@ -2713,23 +2740,24 @@ float32 float64_to_float32( float64 a STATUS_PARAM )
| than the desired result exponent whenever `zSig' is a complete, normalized
| significand.
*----------------------------------------------------------------------------*/
static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig)
static float16 packFloat16(flag zSign, int16 zExp, bits16 zSig)
{
return (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig;
return make_float16(
(((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig);
}
/* Half precision floats come in two formats: standard IEEE and "ARM" format.
The latter gains extra exponent range by omitting the NaN/Inf encodings. */
float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM )
float32 float16_to_float32(float16 a, flag ieee STATUS_PARAM)
{
flag aSign;
int16 aExp;
bits32 aSig;
aSign = a >> 15;
aExp = (a >> 10) & 0x1f;
aSig = a & 0x3ff;
aSign = extractFloat16Sign(a);
aExp = extractFloat16Exp(a);
aSig = extractFloat16Frac(a);
if (aExp == 0x1f && ieee) {
if (aSig) {
@ -2753,7 +2781,7 @@ float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM )
return packFloat32( aSign, aExp + 0x70, aSig << 13);
}
bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM)
float16 float32_to_float16(float32 a, flag ieee STATUS_PARAM)
{
flag aSign;
int16 aExp;