motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-02 15:23:53 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

Fix typos and docs, trivial changes and RTC devices split

Browse source 
-----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAl2ys7YSHGxhdXJlbnRA
 dml2aWVyLmV1AAoJEPMMOL0/L748A9QP/jrWoywp5vNVti1YJtVpzHx/GOQcqr2s
 1bXFEzEvTAfI1TxQseiz4Z/jW9OmYNSt+lmW8FHBHLn4l4oo8e4/PurSBRa5guW3
 Dsohqe2TAK0Ua1ELf4eoIfGWm2rKwz2TH0iChk6nvWKJaLQPTzjEgAlZSqOx7jfV
 q2+jSKQOzQJDwzMtzOTcan3VxPnru5j4YYlJspSJVNbiQ/bmQMV7JcsXBU5i4Tf+
 Z1679CDe1BiRqcxKTsWEYMvAVmINYYfEsp2RuE+Co1mr9bQj9pBCFfybe7x5T3VG
 FaCEnfMEtOhgAryfW6/k6IfMvHgV6HjvIpfc27ZIn+kMwhhJl6V4Ca9LY7iUKJnf
 zWYl4FbC0NCM3udWdB/ogaZ6GVJ9FHBcZtnGNWesb3H09KLkRrz95mkOJl1/kPnW
 eDhzCO9g49T3zOECjGpodBF0RXGXVl1vTukwYk0I0d7bo8NySJ4dxVX91D0OIq4S
 +TilFrLi1ssXv9/7Y0Y3zC8/p1qVSIzKa1t4618xqf1MO5LfiVRWpPTPgV+0z3kw
 R48LzMqX50KnIT6fY7BY0YsskwZ1BbZmIJ/++6r8M1L+xaegUsIdI8LHI70TJ7JR
 hJ+uTgWky8N19A0OUJj08xjetNOv6Souf2GFaTrGJO0DQbyzwjNwELYNVhagqvOZ
 PHakcrjaMv8G
 =u0rQ
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging

Fix typos and docs, trivial changes and RTC devices split

# gpg: Signature made Fri 25 Oct 2019 09:35:02 BST
# gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg:                issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-pull-request:
  hw/rtc/aspeed_rtc: Remove unused includes
  hw/rtc/xlnx-zynqmp-rtc: Remove unused "ptimer.h" include
  hw/rtc/mc146818: Include mc146818rtc_regs.h a bit less
  hw: Move Aspeed RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move Exynos4210 RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move Xilinx ZynqMP RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move DS1338 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move TWL92230 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move sun4v hypervisor RTC from hw/timer/ to hw/rtc/ subdirectory
  hw: Move M41T80 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move M48T59 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move MC146818 device from hw/timer/ to hw/rtc/ subdirectory
  hw: Move PL031 device from hw/timer/ to hw/rtc/ subdirectory
  hw/timer: Compile devices not target-dependent as common object
  qemu-timer: reuse MIN macro in qemu_timeout_ns_to_ms
  event_notifier: avoid dandling file descriptor in event_notifier_cleanup
  util/async: avoid useless cast
  pci_bridge: fix a typo in comment
  qemu-options.hx: Update for reboot-timeout parameter

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	hw/timer/trace-events
This commit is contained in:
Peter Maydell 2019-10-25 14:17:08 +01:00
commit bad76ac319
56 changed files with 213 additions and 165 deletions
Download patch file Download diff file Expand all files Collapse all files

30
include/hw/timer/aspeed_rtc.h
View file

@ -1,30 +0,0 @@
/*
* ASPEED Real Time Clock
* Joel Stanley <joel@jms.id.au>
*
* Copyright 2019 IBM Corp
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef ASPEED_RTC_H
#define ASPEED_RTC_H
#include <stdint.h>
#include "hw/irq.h"
#include "hw/sysbus.h"
typedef struct AspeedRtcState {
SysBusDevice parent_obj;
MemoryRegion iomem;
qemu_irq irq;
uint32_t reg[0x18];
int offset;
} AspeedRtcState;
#define TYPE_ASPEED_RTC "aspeed.rtc"
#define ASPEED_RTC(obj) OBJECT_CHECK(AspeedRtcState, (obj), TYPE_ASPEED_RTC)
#endif /* ASPEED_RTC_H */

32
include/hw/timer/m48t59.h
View file

@ -1,32 +0,0 @@
#ifndef HW_M48T59_H
#define HW_M48T59_H
#include "exec/hwaddr.h"
#include "qom/object.h"
#define TYPE_NVRAM "nvram"
#define NVRAM_CLASS(klass) \
OBJECT_CLASS_CHECK(NvramClass, (klass), TYPE_NVRAM)
#define NVRAM_GET_CLASS(obj) \
OBJECT_GET_CLASS(NvramClass, (obj), TYPE_NVRAM)
#define NVRAM(obj) \
INTERFACE_CHECK(Nvram, (obj), TYPE_NVRAM)
typedef struct Nvram Nvram;
typedef struct NvramClass {
InterfaceClass parent;
uint32_t (*read)(Nvram *obj, uint32_t addr);
void (*write)(Nvram *obj, uint32_t addr, uint32_t val);
void (*toggle_lock)(Nvram *obj, int lock);
} NvramClass;
Nvram *m48t59_init_isa(ISABus *bus, uint32_t io_base, uint16_t size,
int base_year, int type);
Nvram *m48t59_init(qemu_irq IRQ, hwaddr mem_base,
uint32_t io_base, uint16_t size, int base_year,
int type);
#endif /* HW_M48T59_H */

14
include/hw/timer/mc146818rtc.h
View file

@ -1,14 +0,0 @@
#ifndef MC146818RTC_H
#define MC146818RTC_H
#include "hw/isa/isa.h"
#include "hw/timer/mc146818rtc_regs.h"
#define TYPE_MC146818_RTC "mc146818rtc"
ISADevice *mc146818_rtc_init(ISABus *bus, int base_year,
qemu_irq intercept_irq);
void rtc_set_memory(ISADevice *dev, int addr, int val);
int rtc_get_memory(ISADevice *dev, int addr);
#endif /* MC146818RTC_H */

90
include/hw/timer/mc146818rtc_regs.h
View file

@ -1,90 +0,0 @@
/*
* QEMU MC146818 RTC emulation
*
* Copyright (c) 2003-2004 Fabrice Bellard
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef MC146818RTC_REGS_H
#define MC146818RTC_REGS_H
#include "qemu/timer.h"
#define RTC_ISA_IRQ 8
#define RTC_SECONDS 0
#define RTC_SECONDS_ALARM 1
#define RTC_MINUTES 2
#define RTC_MINUTES_ALARM 3
#define RTC_HOURS 4
#define RTC_HOURS_ALARM 5
#define RTC_ALARM_DONT_CARE 0xC0
#define RTC_DAY_OF_WEEK 6
#define RTC_DAY_OF_MONTH 7
#define RTC_MONTH 8
#define RTC_YEAR 9
#define RTC_REG_A 10
#define RTC_REG_B 11
#define RTC_REG_C 12
#define RTC_REG_D 13
/* PC cmos mappings */
#define RTC_CENTURY 0x32
#define RTC_IBM_PS2_CENTURY_BYTE 0x37
#define REG_A_UIP 0x80
#define REG_B_SET 0x80
#define REG_B_PIE 0x40
#define REG_B_AIE 0x20
#define REG_B_UIE 0x10
#define REG_B_SQWE 0x08
#define REG_B_DM 0x04
#define REG_B_24H 0x02
#define REG_C_UF 0x10
#define REG_C_IRQF 0x80
#define REG_C_PF 0x40
#define REG_C_AF 0x20
#define REG_C_MASK 0x70
static inline uint32_t periodic_period_to_clock(int period_code)
{
if (!period_code) {
return 0;
}
if (period_code <= 2) {
period_code += 7;
}
/* period in 32 Khz cycles */
return 1 << (period_code - 1);
}
#define RTC_CLOCK_RATE 32768
static inline int64_t periodic_clock_to_ns(int64_t clocks)
{
return muldiv64(clocks, NANOSECONDS_PER_SECOND, RTC_CLOCK_RATE);
}
#endif

46
include/hw/timer/pl031.h
View file

@ -1,46 +0,0 @@
/*
* ARM AMBA PrimeCell PL031 RTC
*
* Copyright (c) 2007 CodeSourcery
*
* This file is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* Contributions after 2012-01-13 are licensed under the terms of the
* GNU GPL, version 2 or (at your option) any later version.
*/
#ifndef HW_TIMER_PL031_H
#define HW_TIMER_PL031_H
#include "hw/sysbus.h"
#define TYPE_PL031 "pl031"
#define PL031(obj) OBJECT_CHECK(PL031State, (obj), TYPE_PL031)
typedef struct PL031State {
SysBusDevice parent_obj;
MemoryRegion iomem;
QEMUTimer *timer;
qemu_irq irq;
/*
* Needed to preserve the tick_count across migration, even if the
* absolute value of the rtc_clock is different on the source and
* destination.
*/
uint32_t tick_offset_vmstate;
uint32_t tick_offset;
bool tick_offset_migrated;
bool migrate_tick_offset;
uint32_t mr;
uint32_t lr;
uint32_t cr;
uint32_t im;
uint32_t is;
} PL031State;
#endif

1
include/hw/timer/sun4v-rtc.h
View file

@ -1 +0,0 @@
void sun4v_rtc_init(hwaddr addr);

92
include/hw/timer/xlnx-zynqmp-rtc.h
View file

@ -1,92 +0,0 @@
/*
* QEMU model of the Xilinx ZynqMP Real Time Clock (RTC).
*
* Copyright (c) 2017 Xilinx Inc.
*
* Written-by: Alistair Francis <alistair.francis@xilinx.com>
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#ifndef HW_TIMER_XLNX_ZYNQMP_RTC_H
#define HW_TIMER_XLNX_ZYNQMP_RTC_H
#include "hw/register.h"
#include "hw/sysbus.h"
#define TYPE_XLNX_ZYNQMP_RTC "xlnx-zynmp.rtc"
#define XLNX_ZYNQMP_RTC(obj) \
OBJECT_CHECK(XlnxZynqMPRTC, (obj), TYPE_XLNX_ZYNQMP_RTC)
REG32(SET_TIME_WRITE, 0x0)
REG32(SET_TIME_READ, 0x4)
REG32(CALIB_WRITE, 0x8)
FIELD(CALIB_WRITE, FRACTION_EN, 20, 1)
FIELD(CALIB_WRITE, FRACTION_DATA, 16, 4)
FIELD(CALIB_WRITE, MAX_TICK, 0, 16)
REG32(CALIB_READ, 0xc)
FIELD(CALIB_READ, FRACTION_EN, 20, 1)
FIELD(CALIB_READ, FRACTION_DATA, 16, 4)
FIELD(CALIB_READ, MAX_TICK, 0, 16)
REG32(CURRENT_TIME, 0x10)
REG32(CURRENT_TICK, 0x14)
FIELD(CURRENT_TICK, VALUE, 0, 16)
REG32(ALARM, 0x18)
REG32(RTC_INT_STATUS, 0x20)
FIELD(RTC_INT_STATUS, ALARM, 1, 1)
FIELD(RTC_INT_STATUS, SECONDS, 0, 1)
REG32(RTC_INT_MASK, 0x24)
FIELD(RTC_INT_MASK, ALARM, 1, 1)
FIELD(RTC_INT_MASK, SECONDS, 0, 1)
REG32(RTC_INT_EN, 0x28)
FIELD(RTC_INT_EN, ALARM, 1, 1)
FIELD(RTC_INT_EN, SECONDS, 0, 1)
REG32(RTC_INT_DIS, 0x2c)
FIELD(RTC_INT_DIS, ALARM, 1, 1)
FIELD(RTC_INT_DIS, SECONDS, 0, 1)
REG32(ADDR_ERROR, 0x30)
FIELD(ADDR_ERROR, STATUS, 0, 1)
REG32(ADDR_ERROR_INT_MASK, 0x34)
FIELD(ADDR_ERROR_INT_MASK, MASK, 0, 1)
REG32(ADDR_ERROR_INT_EN, 0x38)
FIELD(ADDR_ERROR_INT_EN, MASK, 0, 1)
REG32(ADDR_ERROR_INT_DIS, 0x3c)
FIELD(ADDR_ERROR_INT_DIS, MASK, 0, 1)
REG32(CONTROL, 0x40)
FIELD(CONTROL, BATTERY_DISABLE, 31, 1)
FIELD(CONTROL, OSC_CNTRL, 24, 4)
FIELD(CONTROL, SLVERR_ENABLE, 0, 1)
REG32(SAFETY_CHK, 0x50)
#define XLNX_ZYNQMP_RTC_R_MAX (R_SAFETY_CHK + 1)
typedef struct XlnxZynqMPRTC {
SysBusDevice parent_obj;
MemoryRegion iomem;
qemu_irq irq_rtc_int;
qemu_irq irq_addr_error_int;
uint32_t tick_offset;
uint32_t regs[XLNX_ZYNQMP_RTC_R_MAX];
RegisterInfo regs_info[XLNX_ZYNQMP_RTC_R_MAX];
} XlnxZynqMPRTC;
#endif