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i386: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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944399ffb2
commit
bad5cfcd60
16 changed files with 27 additions and 27 deletions
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@ -779,7 +779,7 @@ static Aml *initialize_route(Aml *route, const char *link_name,
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*
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* Returns an array of 128 routes, one for each device,
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* based on device location.
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* The main goal is to equaly distribute the interrupts
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* The main goal is to equally distribute the interrupts
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* over the 4 existing ACPI links (works only for i440fx).
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* The hash function is (slot + pin) & 3 -> "LNK[D|A|B|C]".
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*
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@ -2079,7 +2079,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
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}
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/*
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* Insert DMAR scope for PCI bridges and endpoint devcie
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* Insert DMAR scope for PCI bridges and endpoint devices
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*/
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static void
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insert_scope(PCIBus *bus, PCIDevice *dev, void *opaque)
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@ -259,7 +259,7 @@ static void amdvi_log_command_error(AMDVIState *s, hwaddr addr)
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pci_word_test_and_set_mask(s->pci.dev.config + PCI_STATUS,
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PCI_STATUS_SIG_TARGET_ABORT);
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}
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/* log an illegal comand event
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/* log an illegal command event
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* @addr : address of illegal command
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*/
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static void amdvi_log_illegalcom_error(AMDVIState *s, uint16_t info,
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@ -767,7 +767,7 @@ static void amdvi_mmio_write(void *opaque, hwaddr addr, uint64_t val,
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break;
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case AMDVI_MMIO_COMMAND_BASE:
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amdvi_mmio_reg_write(s, size, val, addr);
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/* FIXME - make sure System Software has finished writing incase
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/* FIXME - make sure System Software has finished writing in case
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* it writes in chucks less than 8 bytes in a robust way.As for
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* now, this hacks works for the linux driver
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*/
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@ -52,7 +52,7 @@
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/*
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* PCI bus number (or SID) is not reliable since the device is usaully
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* initalized before guest can configure the PCI bridge
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* initialized before guest can configure the PCI bridge
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* (SECONDARY_BUS_NUMBER).
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*/
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struct vtd_as_key {
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@ -1694,7 +1694,7 @@ static bool vtd_switch_address_space(VTDAddressSpace *as)
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* """
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*
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* We enable per as memory region (iommu_ir_fault) for catching
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* the tranlsation for interrupt range through PASID + PT.
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* the translation for interrupt range through PASID + PT.
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*/
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if (pt && as->pasid != PCI_NO_PASID) {
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memory_region_set_enabled(&as->iommu_ir_fault, true);
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@ -1156,7 +1156,7 @@ static unsigned int copy_to_ring(XenXenstoreState *s, uint8_t *ptr,
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/*
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* This matches the barrier in copy_to_ring() (or the guest's
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* equivalent) betweem writing the data to the ring and updating
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* equivalent) between writing the data to the ring and updating
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* rsp_prod. It protects against the pathological case (which
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* again I think never happened except on Alpha) where our
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* subsequent writes to the ring could *cross* the read of
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@ -1436,7 +1436,7 @@ static void save_node(gpointer key, gpointer value, gpointer opaque)
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/*
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* If we already wrote this node, refer to the previous copy.
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* There's no rename/move in XenStore, so all we need to find
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* it is the tx_id of the transation in which it exists. Which
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* it is the tx_id of the transaction in which it exists. Which
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* may be the root tx.
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*/
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if (n->serialized_tx != XBT_NULL) {
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@ -436,7 +436,7 @@ static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size)
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return 0xffffffffffffffffULL;
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}
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/* MSDOS compatibility mode FPU exception support */
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/* MS-DOS compatibility mode FPU exception support */
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static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
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unsigned size)
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{
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@ -1755,7 +1755,7 @@ static void pc_machine_set_max_fw_size(Object *obj, Visitor *v,
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if (value > 16 * MiB) {
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error_setg(errp,
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"User specified max allowed firmware size %" PRIu64 " is "
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"greater than 16MiB. If combined firwmare size exceeds "
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"greater than 16MiB. If combined firmware size exceeds "
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"16MiB the system may not boot, or experience intermittent"
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"stability issues.",
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value);
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