i386: spelling fixes

Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Michael Tokarev 2023-07-14 14:16:12 +03:00
parent 944399ffb2
commit bad5cfcd60
16 changed files with 27 additions and 27 deletions

View file

@ -779,7 +779,7 @@ static Aml *initialize_route(Aml *route, const char *link_name,
*
* Returns an array of 128 routes, one for each device,
* based on device location.
* The main goal is to equaly distribute the interrupts
* The main goal is to equally distribute the interrupts
* over the 4 existing ACPI links (works only for i440fx).
* The hash function is (slot + pin) & 3 -> "LNK[D|A|B|C]".
*
@ -2079,7 +2079,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
}
/*
* Insert DMAR scope for PCI bridges and endpoint devcie
* Insert DMAR scope for PCI bridges and endpoint devices
*/
static void
insert_scope(PCIBus *bus, PCIDevice *dev, void *opaque)

View file

@ -259,7 +259,7 @@ static void amdvi_log_command_error(AMDVIState *s, hwaddr addr)
pci_word_test_and_set_mask(s->pci.dev.config + PCI_STATUS,
PCI_STATUS_SIG_TARGET_ABORT);
}
/* log an illegal comand event
/* log an illegal command event
* @addr : address of illegal command
*/
static void amdvi_log_illegalcom_error(AMDVIState *s, uint16_t info,
@ -767,7 +767,7 @@ static void amdvi_mmio_write(void *opaque, hwaddr addr, uint64_t val,
break;
case AMDVI_MMIO_COMMAND_BASE:
amdvi_mmio_reg_write(s, size, val, addr);
/* FIXME - make sure System Software has finished writing incase
/* FIXME - make sure System Software has finished writing in case
* it writes in chucks less than 8 bytes in a robust way.As for
* now, this hacks works for the linux driver
*/

View file

@ -52,7 +52,7 @@
/*
* PCI bus number (or SID) is not reliable since the device is usaully
* initalized before guest can configure the PCI bridge
* initialized before guest can configure the PCI bridge
* (SECONDARY_BUS_NUMBER).
*/
struct vtd_as_key {
@ -1694,7 +1694,7 @@ static bool vtd_switch_address_space(VTDAddressSpace *as)
* """
*
* We enable per as memory region (iommu_ir_fault) for catching
* the tranlsation for interrupt range through PASID + PT.
* the translation for interrupt range through PASID + PT.
*/
if (pt && as->pasid != PCI_NO_PASID) {
memory_region_set_enabled(&as->iommu_ir_fault, true);

View file

@ -1156,7 +1156,7 @@ static unsigned int copy_to_ring(XenXenstoreState *s, uint8_t *ptr,
/*
* This matches the barrier in copy_to_ring() (or the guest's
* equivalent) betweem writing the data to the ring and updating
* equivalent) between writing the data to the ring and updating
* rsp_prod. It protects against the pathological case (which
* again I think never happened except on Alpha) where our
* subsequent writes to the ring could *cross* the read of

View file

@ -1436,7 +1436,7 @@ static void save_node(gpointer key, gpointer value, gpointer opaque)
/*
* If we already wrote this node, refer to the previous copy.
* There's no rename/move in XenStore, so all we need to find
* it is the tx_id of the transation in which it exists. Which
* it is the tx_id of the transaction in which it exists. Which
* may be the root tx.
*/
if (n->serialized_tx != XBT_NULL) {

View file

@ -436,7 +436,7 @@ static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size)
return 0xffffffffffffffffULL;
}
/* MSDOS compatibility mode FPU exception support */
/* MS-DOS compatibility mode FPU exception support */
static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
unsigned size)
{
@ -1755,7 +1755,7 @@ static void pc_machine_set_max_fw_size(Object *obj, Visitor *v,
if (value > 16 * MiB) {
error_setg(errp,
"User specified max allowed firmware size %" PRIu64 " is "
"greater than 16MiB. If combined firwmare size exceeds "
"greater than 16MiB. If combined firmware size exceeds "
"16MiB the system may not boot, or experience intermittent"
"stability issues.",
value);