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target/xtensa: add linux-user support
Import list of syscalls from the kernel source. Conditionalize code/data that is only used with softmmu. Implement exception handlers. Implement signal hander (only the core registers for now, no coprocessors or TIE). Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Laurent Vivier <laurent@vivier.eu> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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22 changed files with 1705 additions and 44 deletions
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@ -45,9 +45,13 @@ static void xtensa_cpu_set_pc(CPUState *cs, vaddr value)
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static bool xtensa_cpu_has_work(CPUState *cs)
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{
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#ifndef CONFIG_USER_ONLY
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XtensaCPU *cpu = XTENSA_CPU(cs);
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return !cpu->env.runstall && cpu->env.pending_irq_level;
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#else
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return true;
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#endif
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}
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/* CPUClass::reset() */
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@ -62,8 +66,16 @@ static void xtensa_cpu_reset(CPUState *s)
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env->exception_taken = 0;
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env->pc = env->config->exception_vector[EXC_RESET0 + env->static_vectors];
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env->sregs[LITBASE] &= ~1;
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#ifndef CONFIG_USER_ONLY
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env->sregs[PS] = xtensa_option_enabled(env->config,
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XTENSA_OPTION_INTERRUPT) ? 0x1f : 0x10;
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env->pending_irq_level = 0;
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#else
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env->sregs[PS] =
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(xtensa_option_enabled(env->config,
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XTENSA_OPTION_WINDOWED_REGISTER) ? PS_WOE : 0) |
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PS_UM | (3 << PS_RING_SHIFT);
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#endif
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env->sregs[VECBASE] = env->config->vecbase;
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env->sregs[IBREAKENABLE] = 0;
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env->sregs[MEMCTL] = MEMCTL_IL0EN & env->config->memctl_mask;
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@ -73,9 +85,10 @@ static void xtensa_cpu_reset(CPUState *s)
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env->sregs[CONFIGID0] = env->config->configid[0];
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env->sregs[CONFIGID1] = env->config->configid[1];
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env->pending_irq_level = 0;
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#ifndef CONFIG_USER_ONLY
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reset_mmu(env);
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s->halted = env->runstall;
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#endif
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}
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static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
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@ -104,11 +117,12 @@ static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
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static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp)
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{
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CPUState *cs = CPU(dev);
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XtensaCPU *cpu = XTENSA_CPU(dev);
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XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev);
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Error *local_err = NULL;
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xtensa_irq_init(&cpu->env);
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#ifndef CONFIG_USER_ONLY
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xtensa_irq_init(&XTENSA_CPU(dev)->env);
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#endif
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cpu_exec_realizefn(cs, &local_err);
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if (local_err != NULL) {
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@ -133,11 +147,13 @@ static void xtensa_cpu_initfn(Object *obj)
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cs->env_ptr = env;
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env->config = xcc->config;
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#ifndef CONFIG_USER_ONLY
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env->address_space_er = g_malloc(sizeof(*env->address_space_er));
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env->system_er = g_malloc(sizeof(*env->system_er));
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memory_region_init_io(env->system_er, NULL, NULL, env, "er",
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UINT64_C(0x100000000));
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address_space_init(env->address_space_er, env->system_er, "ER");
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#endif
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}
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static const VMStateDescription vmstate_xtensa_cpu = {
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@ -166,7 +182,9 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
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cc->gdb_read_register = xtensa_cpu_gdb_read_register;
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cc->gdb_write_register = xtensa_cpu_gdb_write_register;
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cc->gdb_stop_before_watchpoint = true;
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#ifndef CONFIG_USER_ONLY
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#ifdef CONFIG_USER_ONLY
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cc->handle_mmu_fault = xtensa_cpu_handle_mmu_fault;
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#else
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cc->do_unaligned_access = xtensa_cpu_do_unaligned_access;
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cc->get_phys_page_debug = xtensa_cpu_get_phys_page_debug;
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cc->do_unassigned_access = xtensa_cpu_do_unassigned_access;
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